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Implementation of HSSec: a high-speed cryptographic co-processor.
Athanasios P. Kakarountas
Haralambos Michail
Costas E. Goutis
Costas Efstathiou
Published in:
ETFA (2007)
Keyphrases
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high speed
low power
real time
smart card
computer architecture
parallel processing
instruction set
frame rate
memory management