Kostas Masselos

Publication Activity (10 Years)

Years Active: 1996-2014
Publications (10 Years): 0

Top Topics

Design Space Exploration

Consumer Electronics

Hardware Architectures

Computing Power

Top Venues

Panhellenic Conference on Informatics

Publications

Vasiliki Giannakopoulou, Kostas Masselos
Hardware architecture for Fast 2D distance transformations. ICDIP (2014)
Nikolaos Kavvadias, Kostas Masselos
The HercuLeS high-level synthesis environment. FPL (2013)
Nikolaos Kavvadias, Kostas Masselos
Hardware design space exploration using HercuLeS HLS. Panhellenic Conference on Informatics (2013)
Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Olivier Sentieys, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, Thomas Perschke
Compiling Scilab to high performance embedded multicore systems. Microprocess. Microsystems 37 (8-C) (2013)
Jürgen Becker, Timo Stripf, Oliver Oey, Michael Hübner, Steven Derrien, Daniel Ménard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Göhringer
From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach. DSD (2012)
George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Ménard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas
From Scilab to multicore embedded systems: Algorithms and methodologies. ICSAMOS (2012)
Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Ménard, Olivier Sentieys, Diana Göhringer, Thomas Perschke
A flexible approach for compiling scilab to reconfigurable multi-core embedded systems. ReCoSoC (2012)
Nikolaos Kavvadias, Kostas Masselos
Automated Synthesis of FSMD-Based Accelerators for Hardware Compilation. ASAP (2012)
Nikolaos Kavvadias, Kostas Masselos
Design of fixed-point rounding operators for the VHDL-2008 standard. DASIP (2012)
Theodoros Lioris, Grigoris Dimitroulakos, Kostas Masselos
XMSIM: Extensible Memory Simulator for Early Memory Hierarchy Evaluation. ISVLSI (Selected papers) (2010)
Theodoros Lioris, Grigoris Dimitroulakos, Kostas Masselos
XMSIM: EXtensible Memory SIMulator for Early Memory Hierarchy Evaluation. ISVLSI (2010)
Kieron Turkington, Turkington A. Constantinides, Kostas Masselos, Peter Y. K. Cheung
Outer Loop Pipelining for Application Specific Datapaths in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 16 (10) (2008)
Maria E. Angelopoulou, Kostas Masselos, Peter Y. K. Cheung, Yiannis Andreopoulos
Implementation and Comparison of the 5/3 Lifting 2D Discrete Wavelet Transform Computation Schedules on FPGAs. J. Signal Process. Syst. 51 (1) (2008)
Kostas Masselos, Yiannis Andreopoulos, Thanos Stouraitis
Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP. ISCAS (2006)
Kostas Masselos, Spyros Blionas, Jean-Yves Mignolet, A. Foster, Dimitrios Soudris, Spiridon Nikolaidis
Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform. PATMOS (2004)
Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis
A reusable IP FFT core for DSP applications. ISCAS (3) (2004)
Yang Qu, Kari Tiensyrjä, Kostas Masselos
System-Level Modeling of Dynamically Reconfigurable Co-processors. FPL (2004)
Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors. J. VLSI Signal Process. 37 (1) (2004)
Kari Tiensyrjä, Miroslav Cupák, Kostas Masselos, Marko Pettissalo
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip. FDL (2004)
Kostas Masselos, Antti Pelkonen, Miroslav Cupák, Spyros Blionas
Realization of wireless multimedia communication systems on reconfigurable platforms. J. Syst. Archit. 49 (4-6) (2003)
Kostas Masselos, Panagiotis Merakos, S. Theoharis, Thanos Stouraitis, Constantinos E. Goutis
Power efficient data path synthesis of sum-of-products computations. IEEE Trans. Very Large Scale Integr. Syst. 11 (3) (2003)
Antti Pelkonen, Kostas Masselos, Miroslav Cupák
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC. IPDPS (2003)
Yiannis Andreopoulos, Peter Schelkens, Gauthier Lafruit, Kostas Masselos, Jan Cornelis
High-Level Cache Modeling for 2-D Discrete Wavelet Transform Implementations. J. VLSI Signal Process. 34 (3) (2003)
Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
Systematic Application of Data Transfer and Storage Optimizing Code Transformations for Power Consumption and Execution Time Reduction in ACROPOLIS: A Pre-Compiler for Multimedia Applications. Des. Autom. Embed. Syst. 8 (1) (2003)
Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas
Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms. PATMOS (2003)
Yiannis Andreopoulos, Kostas Masselos, Peter Schelkens, Gauthier Lafruit, Jan Cornelis
Cache misses and energy-dissipation results for JPEG-2000 filtering. DSP (2002)
Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
A systematic methodology for the application of data transfer and storage optimizing code transformations for power consumption and execution time reduction in realizations of multimedia algorithms on programmable processors. IEEE Trans. Very Large Scale Integr. Syst. 10 (4) (2002)
Kostas Masselos, Panagiotis Merakos, Constantinos E. Goutis
Power Efficient Vector Quantization Design Using Pixel Truncation. PATMOS (2002)
Spyros Blionas, Kostas Masselos, Chrissavgi Dre, Christos Drosos, F. Z. Ieromnimon, T. Pagonis, Aristodemos Pneymatikakis, Anna Tatsaki, T. Trimis, A. Vontzalidis, Dimitris Metafas
A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip. FPL (2002)
George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations. FPL (2002)
Kostas Masselos, Francky Catthoor, A. Kakarudas, Costas E. Goutis, Hugo De Man
Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architectures. ICECS (2001)
Kostas Masselos, Yorgos A. Karayiannis, I. Andreopoulos, Thanos Stouraitis
Development of a power efficient image coding algorithm based on integer wavelet transform. ICECS (2000)
Kostas Masselos, S. Theoharis, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Low power synthesis of sum-of-products computation (poster session). ISLPED (2000)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Low power architectures for digital signal processing. J. Syst. Archit. 46 (7) (2000)
Kostas Masselos, Koen Danckaert, Francky Catthoor, Nikolaos D. Zervas, Constantinos E. Goutis, Hugo De Man
A Specification Refinement Methodology for Power Efficient Partitioning of Data-Dominated Algorithms Within Performance Constraints. J. VLSI Signal Process. 26 (3) (2000)
Koen Danckaert, Kostas Masselos, Francky Catthoor, Hugo De Man
Strategy for power efficient combined task and data parallelism exploration illustrated on a QSDPCM video codec. J. Syst. Archit. 45 (10) (1999)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Novel techniques for bus power consumption reduction in realizations of sum-of-product computation. IEEE Trans. Very Large Scale Integr. Syst. 7 (4) (1999)
Koen Danckaert, Kostas Masselos, Francky Catthoor, Hugo De Man, Constantinos E. Goutis
Strategy for power-efficient design of parallel systems. IEEE Trans. Very Large Scale Integr. Syst. 7 (2) (1999)
Nikolaos D. Zervas, Kostas Masselos, Odysseas G. Koufopavlou, Constantinos E. Goutis
Power exploration of multimedia applications realized on embedded cores. ISCAS (4) (1999)
Kostas Masselos, Koen Danckaert, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints. ISLPED (1999)
Kostas Masselos, Francky Catthoor, Costas E. Goutis, H. DeMan
System-level power optimizing data-flow transformations for multimedia applications realized on programmable multimedia processors. ICECS (1999)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Computation Reordering: A Novel Transformation for Low Power DSP Synthesis. VLSI Design 1999 (2) (1999)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Low power synthesis of sum-of-product computation in DSP algorithms. ISCAS (6) (1999)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Trade-Off Analysis of a Low-Power Image Coding Algorithm. J. VLSI Signal Process. 18 (1) (1998)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Low-power implementation of discrete wavelet transform. EUSIPCO (1998)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
A novel algorithm for low-power image and video coding. IEEE Trans. Circuits Syst. Video Technol. 8 (3) (1998)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Costas E. Goutis
Low-power image decoding using fractals. ICECS (1996)
Kostas Masselos, Konstantina Karagianni, Yorgos A. Karayiannis, Thanos Stouraitis
A parallel image compression scheme based on fractal coding and vector quantization. ICECS (1996)