Antonios Thanailakis

Publication Activity (10 Years)

Years Active: 1993-2010
Publications (10 Years): 0

Publications

Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis
A Novel Allocation Methodology for Partial and Dynamic Bitstream Generation for FPGA Architectures. J. Circuits Syst. Comput. 19 (3) (2010)
Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis
Designing a General-Purpose Interconnection Architecture for Field Programmable Gate Arrays. J. Low Power Electron. 4 (1) (2008)
Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck CoRR (2007)
Stylianos Mamagkakis, Alexandros Bartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement. J. Syst. Archit. 53 (7) (2007)
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis
Designing Heterogeneous FPGAs with Multiple SBs. ARC (2007)
Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance. Comput. Commun. 29 (13-14) (2006)
Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis
Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources. PATMOS (2006)
Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis
A novel methodology for designing high-performance and low-energy FPGA routing architecture. FPGA (2006)
Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis
Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique. VLSI-SoC (2006)
Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. J. VLSI Signal Process. 44 (1-2) (2006)
Alexandros Bartzas, Stylianos Mamagkakis, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications. DATE (2006)
Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos
A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications. IEICE Trans. Inf. Syst. (7) (2005)
Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck. DATE (2005)
Minas Dasygenis, Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
Improving the Memory Bandwidth Utilization Using Loop Transformations. PATMOS (2005)
Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, José M. Mendías, Antonios Thanailakis
Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications. WWIC (2005)
Nikolas Kroupis, Minas Dasygenis, Dimitrios Soudris, Antonios Thanailakis
A Modified Spiral Search Algorithm and its Embedded Hardware Implementation. IEC (Prague) (2005)
Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis
A reusable IP FFT core for DSP applications. ISCAS (3) (2004)
Stylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis
Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. WWIC (2004)
Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications. SAMOS (2004)
Ioannis Tsimperidis, Ioannis Karafyllidis, Antonios Thanailakis
Design and simulation of a nanoelectronic single-electron universal Control-Control-Not gate. Microelectron. J. 35 (5) (2004)
Konstantinos Tatas, Minas Dasygenis, Nikolas Kroupis, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
Data memory power optimization and performance exploration of embedded systems for implementing motion estimation algorithms. Real Time Imaging 9 (6) (2003)
Nikolas Kroupis, Minas Dasygenis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis, Nikolaos D. Zervas, Constantinos E. Goutis
Power, performance and area exploration of block matching algorithms mapped on programmable processors. ICIP (3) (2001)
Panagiotis Tzionas, Antonios Thanailakis, Philippos Tsalides
A hybrid cellular automaton/neural network classifier for multi-valued patterns and its VLSI implementation. Integr. 20 (2) (1996)
Panagiotis Tzionas, Philippos Tsalides, Antonios Thanailakis
2-Dimensional minimum cost path planning using a cellular automaton architecture. Integr. 16 (2) (1993)