A novel methodology for designing high-performance and low-energy FPGA routing architecture.
Kostas SioziosKonstantinos TatasDimitrios SoudrisAntonios ThanailakisPublished in: FPGA (2006)
Keyphrases
- low energy
- coarse grained
- electron microscopy
- hardware implementation
- hardware architecture
- minimum energy
- hardware design
- real time
- fine grained
- protein folding
- pipelined architecture
- network architecture
- routing algorithm
- x ray
- reconfigurable hardware
- fpga technology
- management system
- routing problem
- ad hoc networks
- response time