A low power fault secure timer implementation based on the Gray encoding scheme.
Kyriakos S. PapadomanolakisAthanasios P. KakarountasNicolas SklavosCostas E. GoutisPublished in: ICECS (2002)
Keyphrases
- low power
- encoding scheme
- power consumption
- high speed
- vlsi architecture
- low cost
- cmos technology
- wireless transmission
- high power
- signal processor
- ultra low power
- single chip
- encoding schemes
- digital signal processing
- genetic algorithm
- low power consumption
- mixed signal
- vlsi circuits
- logic circuits
- vlsi implementation