Arnaud Tisserand

ORCID

Publication Activity (10 Years)

Years Active: 1995-2023
Publications (10 Years): 27

Top Venues

IEEE Trans. Computers

INDOCRYPT

ARITH

IACR Cryptol. ePrint Arch.

École normale supérieure de Lyon, France (PHD)

Education History

École normale supérieure de Lyon, France

PHD

Publications

Fabrice Lozachmeur, Arnaud Tisserand
A RISC-V Instruction Set Extension for Flexible Hardware/Software Protection of Cryptosystems Masked at High Orders. MWSCAS (2023)
Timo Zijlstra, Karim Bigou, Arnaud Tisserand
Lattice-Based Cryptosystems on FPGA: Parallelization and Comparison Using HLS. IEEE Trans. Computers 71 (8) (2022)
Noura Ait Manssour, Vianney Lapôtre, Guy Gogniat, Arnaud Tisserand
Processor Extensions for Hardware Instruction Replay against Fault Injection Attacks. DDECS (2022)
Geneviève Ndour, Tiago Trevisan Jost, Anca Molnos, Yves Durand, Arnaud Tisserand
Evaluation of variable bit-width units in a RISC-V processor for approximate computing. CF (2019)
Libey Djath, Karim Bigou, Arnaud Tisserand
Hierarchical Approach in RNS Base Extension for Asymmetric Cryptography. ARITH (2019)
Gabriel Gallin, Arnaud Tisserand
P) Multipliers for Flexible Curve Based Cryptography on FPGAs. IEEE Trans. Computers 68 (11) (2019)
Timo Zijlstra, Karim Bigou, Arnaud Tisserand
FPGA Implementation and Comparison of Protections Against SCAs for RLWE. INDOCRYPT (2019)
Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm. IEEE Trans. Computers 67 (3) (2018)
Diego F. G. Coelho, Sushmabhargavi Nimmalapalli, Vassil S. Dimitrov, Arjuna Madanayake, Renato J. Cintra, Arnaud Tisserand
Computation of 2D 8×8 DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding. IEEE Trans. Computers 67 (12) (2018)
Geneviève Ndour, Tiago Trevisan Jost, Anca Molnos, Yves Durand, Arnaud Tisserand
Evaluation of approximate operators case study: sobel filter application executed on an approximate RISC-V platform. SAMOS (2018)
Audrey Lucas, Arnaud Tisserand
Microcontroller Implementation of Simultaneous Protections Against Observation and Perturbation Attacks for ECC. ICETE (2) (2018)
Vincent Migliore, Cédric Seguin, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat, Russell Tessier
A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm. ACM Trans. Embed. Comput. Syst. 16 (5s) (2017)
Javier Hormigo, Jean-Michel Muller, Stuart F. Oberman, Nathalie Revol, Arnaud Tisserand, Julio Villalba-Moreno
Introduction to the Special Issue on Computer Arithmetic. IEEE Trans. Computers 66 (12) (2017)
Gabriel Gallin, Arnaud Tisserand
Hyper-threaded multiplier for HECC. ACSSC (2017)
Gabriel Gallin, Türkü Özlüm Çelik, Arnaud Tisserand
Architecture level Optimizations for Kummer based HECC on FPGAs. IACR Cryptol. ePrint Arch. 2017 (2017)
Gabriel Gallin, Türkü Özlüm Çelik, Arnaud Tisserand
Architecture Level Optimizations for Kummer Based HECC on FPGAs. INDOCRYPT (2017)
Imran Wali, Emmanuel Casseau, Arnaud Tisserand
An efficient framework for design and assessment of arithmetic operators with Reduced-Precision Redundancy. DASIP (2017)
Karim Bigou, Arnaud Tisserand
Hybrid Position-Residues Number System. ARITH (2016)
Karim Bigou, Arnaud Tisserand
Binary-Ternary Plus-Minus Modular Inversion in RNS. IEEE Trans. Computers 65 (11) (2016)
Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm. FPT (2016)
Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
Exploration of polynomial multiplication algorithms for homomorphic encryption schemes. ReConFig (2015)
Ghada Y. Abozaid, Arnaud Tisserand, Ahmed El-Mahdy, Yasutaka Wada
Towards FHE in Embedded Systems: A Preliminary Codesign Space Exploration of a HW/SW Very Large Multiplier. IEEE Embed. Syst. Lett. 7 (3) (2015)
Danuta Pamula, Arnaud Tisserand
Fast and Secure Finite Field Multipliers. DSD (2015)
Karim Bigou, Arnaud Tisserand
Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECC. CHES (2015)
Jiaoyan Chen, Arnaud Tisserand, Emanuel M. Popovici, Sorin Cotofana
Asynchronous Charge Sharing Power Consistent Montgomery Multiplier. ASYNC (2015)
Karim Bigou, Arnaud Tisserand
Improving Modular Inversion in RNS using the Plus-Minus Method. IACR Cryptol. ePrint Arch. 2015 (2015)
Jérémy Métairie, Arnaud Tisserand, Emmanuel Casseau
Small FPGA Based Multiplication-Inversion Unit for Normal Basis Representation in GF(2m). ISVLSI (2015)
Karim Bigou, Arnaud Tisserand
RNS modular multiplication through reduced base extensions. ASAP (2014)
Jiaoyan Chen, Arnaud Tisserand, Emanuel M. Popovici, Sorin Cotofana
Robust sub-powered asynchronous logic. PATMOS (2014)
Thomas Chabrier, Arnaud Tisserand
On-the-Fly Multi-base Recoding for ECC Scalar Multiplication without Pre-computations. IEEE Symposium on Computer Arithmetic (2013)
Loïc Lagadec, Sébastien Pillement, Arnaud Tisserand
Introduction. Tech. Sci. Informatiques 32 (2) (2013)
Karim Bigou, Arnaud Tisserand
Improving Modular Inversion in RNS Using the Plus-Minus Method. CHES (2013)
Danuta Pamula, Arnaud Tisserand
$\textrm{GF}(2^m)$ Finite-Field Multipliers with Reduced Activity Variations. WAIFI (2012)
Danuta Pamula, Edward Hrynkiewicz, Arnaud Tisserand
Analysis of GF (2233) multipliers regarding elliptic curve cryptosystem applications. PDeS (2012)
Mark Hamilton, William P. Marnane, Arnaud Tisserand
A Comparison on FPGA of Modular Multipliers Suitable for Elliptic Curve Cryptography over GF(p) for Specific p Values. FPL (2011)
Danuta Pamula, Edward Hrynkiewicz, Arnaud Tisserand
Multiplication in GF(2m): Area and time dependency/efficiency/complexity analysis. PDeS (2010)
Sylvain Collange, David Defour, Arnaud Tisserand
Power Consumption of GPUs from a Software Perspective. ICCS (1) (2009)
Pascal Giorgi, Thomas Izard, Arnaud Tisserand
Comparison of Modular Arithmetic Algorithms on GPUs. PARCO (2009)
Julien Francq, Jean-Baptiste Rigaud, Pascal Manet, Assia Tria, Arnaud Tisserand
Error Detection for Borrow-Save Adders Dedicated to ECC Unit. FDTC (2008)
Arnaud Tisserand
Fast and accurate activity evaluation in multipliers. ACSCC (2008)
Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Optimisation d'opérateurs arithmétiques matériels à base d'approximations polynomiales. Tech. Sci. Informatiques 27 (6) (2008)
Andrew Byrne, Nicolas Meloni, Francis M. Crowe, William P. Marnane, Arnaud Tisserand, Emanuel M. Popovici
SPA resistant Elliptic Curve Cryptosystem using Addition Chains. ITNG (2007)
Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Multi-mode operator for SHA-2 hash functions. J. Syst. Archit. 53 (2-3) (2007)
Andrew Byrne, Nicolas Meloni, Arnaud Tisserand, Emanuel M. Popovici, William P. Marnane
Comparison of Simple Power Analysis Attack Resistant Algorithms for an Elliptic Curve Cryptosystem. J. Comput. 2 (10) (2007)
Arnaud Tisserand
High-performance hardware operators for polynomial evaluation. Int. J. High Perform. Syst. Archit. 1 (1) (2007)
Arnaud Tisserand
Chronique : Introduction aux représentations des nombres et opérateurs arithmétiques à basse consommation d'énergie. Tech. Sci. Informatiques 26 (5) (2007)
Andrew Byrne, Francis M. Crowe, William P. Marnane, Nicolas Meloni, Arnaud Tisserand, Emanuel M. Popovici
SPA resistant elliptic curve cryptosystem using addition chains. Int. J. High Perform. Syst. Archit. 1 (2) (2007)
Nicolas Brisebarre, Jean-Michel Muller, Arnaud Tisserand
Computing machine-efficient polynomial approximations. ACM Trans. Math. Softw. 32 (2) (2006)
Arnaud Tisserand
Hardware Operator for Simultaneous Sine and Cosine Evaluation. ICASSP (3) (2006)
Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Multi-Mode Operator for SHA-2 Hash Functions. ERSA (2006)
Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Carry Prediction and Selection for Truncated Multiplication. SiPS (2006)
Rachid Beguenane, Jean-Gabriel Mailloux, Stéphane Simard, Arnaud Tisserand
Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time. CCECE (2006)
Romain Michard, Arnaud Tisserand, Nicolas Veyrat-Charvillon
Small FPGA polynomial approximations with 3-bit coefficients and low-precision estimations of the powers of x. ASAP (2005)
Jean-Michel Muller, Arnaud Tisserand, Benoît Dupont de Dinechin, Christophe Monat
Division by Constant for the ST100 DSP Microprocessor. IEEE Symposium on Computer Arithmetic (2005)
Florent de Dinechin, Arnaud Tisserand
Multipartite Table Methods. IEEE Trans. Computers 54 (3) (2005)
Nicolas Boullis, Arnaud Tisserand
Some Optimizations of Hardware Multiplication by Constant Matrices. IEEE Trans. Computers 54 (10) (2005)
Jean-Luc Beuchat, Arnaud Tisserand
Évaluation polynomiale en-ligne de fonctions élémentaires sur FPGA. Tech. Sci. Informatiques 23 (10) (2004)
Nicolas Boullis, Arnaud Tisserand
Some Optimizations of Hardware Multiplication by Constant Matrices. IEEE Symposium on Computer Arithmetic (2003)
Jean-Luc Beuchat, Arnaud Tisserand
Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices. FPL (2002)
Florent de Dinechin, Arnaud Tisserand
Some Improvements on Multipartite Table Methods . IEEE Symposium on Computer Arithmetic (2001)
Milos D. Ercegovac, Tomás Lang, Jean-Michel Muller, Arnaud Tisserand
Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. IEEE Trans. Computers 49 (7) (2000)
Arnaud Tisserand, Pierre Marchal, Christian Piguet
An On-Line Arithmetic Based FPGA for Low-Power Custom Computing. FPL (1999)
Vincent Lefèvre, Jean-Michel Muller, Arnaud Tisserand
Toward Correctly Rounded Transcendentals. IEEE Trans. Computers 47 (11) (1998)
Jean-Michel Muller, Alexandre Scherbyna, Arnaud Tisserand
Semi-Logarithmic Number Systems. IEEE Trans. Computers 47 (2) (1998)
Pascal Nussbaum, Bernard Girau, Arnaud Tisserand
Field Programmable Processor Arrays. ICES (1998)
Vincent Lefèvre, Arnaud Tisserand, Jean-Michel Muller
Towards Correctly Rounded Transcendentals. IEEE Symposium on Computer Arithmetic (1997)
Arnaud Tisserand, Martin Dimmler
FPGA implementation of real-time digital controllers using on-line arithmetic. FPL (1997)
Jean-Michel Muller, Arnaud Tisserand, Alexandre Scherbyna
Semi-Logarithmic Number Systems. IEEE Symposium on Computer Arithmetic (1995)

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Publication Activity (10 Years)

Top Topics

Top Venues

Arnaud Tisserand