Vianney Lapotre

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 27

Top Topics

Homomorphic Encryption

Information Flows

Top Venues

Publications

Nicolas Gaudin, Jean-Loup Hatchikian-Houdot, Frédéric Besson, Pascal Cotret, Guy Gogniat, Guillaume Hiet, Vianney Lapotre, Pierre Wilke
Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections. EuroS&P Workshops (2023)
Maria Mushtaq, Muhammad Muneeb Yousaf, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat
The Kingsguard OS-level mitigation against cache side-channel attacks using runtime detection. Ann. des Télécommunications 77 (11-12) (2022)
Maria Mushtaq, Jeremy Bricq, Muhammad Khurram Bhatti, Ayaz Akram, Vianney Lapotre, Guy Gogniat, Pascal Benoit
WHISPER: A Tool for Run-Time Detection of Side-Channel Attacks. IEEE Access 8 (2020)
Maria Mushtaq, Muhammad Asim Mukhtar, Vianney Lapotre, Muhammad Khurram Bhatti, Guy Gogniat
Winter is here! A decade of cache-based side-channel attacks, detection & mitigation for RSA. Inf. Syst. 92 (2020)
Muhammad Asim Mukhtar, Maria Mushtaq, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat
FLUSH + PREFETCH: A countermeasure against access-driven cache-based side-channel attacks. J. Syst. Archit. 104 (2020)
Ayaz Akram, Maria Mushtaq, Muhammad Khurram Bhatti, Vianney Lapotre, Guy Gogniat
Meet the Sherlock Holmes' of Side Channel Leakage: A Survey of Cache SCA Detection Techniques. IEEE Access 8 (2020)
Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Usman Ali, Vianney Lapotre, Guy Gogniat
Sherlock Holmes of Cache Side-Channel Attacks in Intel's x86 Architecture. CNS (2019)
Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
Hardware/Software Co-Design of an Accelerator for FV Homomorphic Encryption Scheme Using Karatsuba Algorithm. IEEE Trans. Computers 67 (3) (2018)
Maria Mendez Real, Philipp Wehner, Vianney Lapotre, Diana Göhringer, Guy Gogniat
Application Deployment Strategies for Spatial Isolation on Many-Core Accelerators. ACM Trans. Embed. Comput. Syst. 17 (2) (2018)
Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Rao Naveed Bin Rais, Vianney Lapotre, Guy Gogniat
Run-time Detection of Prime + Probe Side-Channel Attack on AES Encryption Algorithm. GIIS (2018)
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Arnab Kumar Biswas, Vianney Lapotre, Guy Gogniat
A small and adaptive coprocessor for information flow tracking in ARM SoCs. ReConFig (2018)
Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Maham Chaudhry, Muneeb Yousaf, Umer Farooq, Vianney Lapotre, Guy Gogniat
Machine Learning For Security: The Case of Side-Channel Attack Detection at Run-time. ICECS (2018)
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat, Arnab Kumar Biswas
A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components. AsianHOST (2018)
Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Maham Chaudhry, Vianney Lapotre, Guy Gogniat
NIGHTs-WATCH: a cache-based side-channel intrusion detector using hardware performance counters. HASP@ISCA (2018)
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
Towards a hardware-assisted information flow tracking ecosystem for ARM processors. CoRR (2018)
Cyrielle Feron, Vianney Lapotre, Loïc Lagadec
Fast Evaluation of Homomorphic Encryption Schemes Based on Ring-LWE. NTMS (2018)
Vianney Lapotre, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet
Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decoding. EURASIP J. Adv. Signal Process. 2017 (2017)
Vincent Migliore, Cédric Seguin, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat, Russell Tessier
A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm. ACM Trans. Embed. Comput. Syst. 16 (5s) (2017)
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
ARMHEx: A framework for efficient DIFT in real-world SoCs. FPL (2017)
Cyrielle Feron, Vianney Lapotre, Loïc Lagadec
PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption Schemes. SECRYPT (2017)
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
ARMHEx: A hardware extension for DIFT on ARM-based SoCs. FPL (2017)
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat
Towards a hardware-assisted information flow tracking ecosystem for ARM processors. FPL (2016)
Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet
A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. 24 (1) (2016)
Maria Mendez Real, Philipp Wehner, Jens Rettkowski, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat
MPSoCSim extension: An OVP simulator for the evaluation of cluster-based multi and many-core architectures. SAMOS (2016)
Maria Mendez Real, Philipp Wehner, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat
Dynamic spatially isolated secure zones for NoC-based many-core accelerators. ReCoSoC (2016)
Maria Mendez Real, Vincent Migliore, Vianney Lapotre, Guy Gogniat
ALMOS Many-Core Operating System Extension with New Secure-Enable Mechanisms for Dynamic Creation of Secure Zones. PDP (2016)
Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm. FPT (2016)
Vincent Migliore, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat
Exploration of polynomial multiplication algorithms for homomorphic encryption schemes. ReConFig (2015)
Anastasiia Butko, Rafael Garibotti, Luciano Ost, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Chris Adeniyi-Jones
A trace-driven approach for fast and accurate simulation of manycore architectures. ASP-DAC (2015)
Charles Effiong, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial, Khalid Latif
On the Performance Exploration of 3D NoCs with Resistive-Open TSVs. ISVLSI (2015)
Anelise Kologeski, Fernanda Lima Kastensmidt, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial
Performance exploration of partially connected 3D NoCs under manufacturing variability. NEWCAS (2014)
Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner
A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP context. ISVLSI (2013)
Purushotham Murugappa, Vianney Lapotre, Amer Baghdadi, Michel Jézéquel
Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes. RSP (2013)
Vianney Lapotre, Michael Hübner, Guy Gogniat, Purushotham Murugappa, Amer Baghdadi, Jean-Philippe Diguet
An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture. ReCoSoC (2013)
Vianney Lapotre, Philippe Coussy, Cyrille Chavet, Hugues Wouafo, Robin Danilo
Dynamic branch prediction for high-level synthesis. FPL (2013)
Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner
Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder. ISCAS (2013)
Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet
Stopping-Free Dynamic Configuration of a Multi-ASIP Turbo Decoder. DSD (2013)
Vianney Lapotre, Philippe Coussy, Cyrille Chavet
Introduction de la prédiction de branchement dans la synthèse de haut niveau. Tech. Sci. Informatiques 32 (2) (2013)
Vianney Lapotre, Guy Gogniat, Jean-Philippe Diguet, Salim Haddad, Amer Baghdadi
An analytical approach for sizing of heterogeneous multiprocessor flexible platforms for iterative demapping and channel decoding. ReConFig (2012)