An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture.
Vianney LapotreMichael HübnerGuy GogniatPurushotham MurugappaAmer BaghdadiJean-Philippe DiguetPublished in: ReCoSoC (2013)
Keyphrases
- dynamic reconfiguration
- analog vlsi
- low cost
- modular design
- vlsi implementation
- high speed
- management system
- highly distributed
- turbo codes
- loosely coupled
- host computer
- grid services
- network infrastructure
- processor core
- real time
- low complexity
- software architecture
- fpga implementation
- multithreading
- reference architecture
- enterprise systems
- content management
- cmos technology
- seamless integration
- video codec
- highly efficient
- video decoder
- cmos image sensor