Processor Extensions for Hardware Instruction Replay against Fault Injection Attacks.
Noura Ait ManssourVianney LapôtreGuy GogniatArnaud TisserandPublished in: DDECS (2022)
Keyphrases
- instruction set
- injection attacks
- instruction set architecture
- memory hierarchy
- computer architecture
- ibm power processor
- floating point
- single chip
- embedded systems
- recommender systems
- ibm zenterprise
- error detection
- low cost
- level parallelism
- multi core processors
- processor core
- collaborative recommender systems
- memory access
- memory management
- real time
- computer systems
- operating system
- lightweight
- database systems