Jean-Luc Beuchat

Publication Activity (10 Years)

Years Active: 1998-2023
Publications (10 Years): 3

Top Topics

Hardware Architecture

Field Programmable Gate Array

Top Venues

IACR Cryptol. ePrint Arch.

IEEE ACM Trans. Comput. Biol. Bioinform.

IEEE Trans. Circuits Syst. I Regul. Pap.

J. Parallel Distributed Comput.

Publications

Jean-Luc Beuchat, Valon Rexhepi
A Digital Identity in the Hands of Swiss Citizens. IACR Cryptol. ePrint Arch. 2023 (2023)
Nuray At, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, Teppei Yamazaki
A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl. J. Parallel Distributed Comput. 106 (2017)
Mehran Mozaffari Kermani, Reza Azarderakhsh, Kui Ren, Jean-Luc Beuchat
Guest Editorial: Introduction to the Special Section on Emerging Security Trends for Biomedical Computations, Devices, and Infrastructures. IEEE ACM Trans. Comput. Biol. Bioinform. 13 (3) (2016)
Nuray At, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, Teppei Yamazaki
Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2014)
Nuray At, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, Teppei Yamazaki
Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA. IACR Cryptol. ePrint Arch. 2013 (2013)
Nuray At, Jean-Luc Beuchat, Ismail San
Compact Implementation of Threefish and Skein on FPGA. IACR Cryptol. ePrint Arch. 2012 (2012)
Nuray At, Jean-Luc Beuchat, Eiji Okamoto, Ismail San, Teppei Yamazaki
A Low-Area Unified Hardware Architecture for the AES and the Cryptographic Hash Function Grøstl. IACR Cryptol. ePrint Arch. 2012 (2012)
Nuray At, Jean-Luc Beuchat, Ismail San
Compact Implementation of Threefish and Skein on FPGA. NTMS (2012)
Diego F. Aranha, Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals
Optimal Eta Pairing on Supersingular Genus-2 Binary Hyperelliptic Curves. CT-RSA (2012)
Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki
A low-area unified hardware architecture for the AES and the cryptographic hash function ECHO. J. Cryptogr. Eng. 1 (2) (2011)
Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki
A Low-Area Unified Hardware Architecture for the AES and the Cryptographic Hash Function ECHO. IACR Cryptol. ePrint Arch. 2011 (2011)
Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez
Fast Architectures for the \eta_T Pairing over Small-Characteristic Supersingular Elliptic Curves. IEEE Trans. Computers 60 (2) (2011)
Jean-Luc Beuchat, Jorge Enrique González-Díaz, Shigeo Mitsunari, Eiji Okamoto, Francisco Rodríguez-Henríquez, Tadanori Teruya
High-Speed Software Implementation of the Optimal Ate Pairing over Barreto-Naehrig Curves. IACR Cryptol. ePrint Arch. 2010 (2010)
Jean-Luc Beuchat, Jorge Enrique González-Díaz, Shigeo Mitsunari, Eiji Okamoto, Francisco Rodríguez-Henríquez, Tadanori Teruya
High-Speed Software Implementation of the Optimal Ate Pairing over Barreto-Naehrig Curves. Pairing (2010)
Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki
Compact implementations of BLAKE-32 and BLAKE-64 on FPGA. FPT (2010)
Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, Hiroyasu Yamamoto
pairing in characteristic three. Comput. Electr. Eng. 36 (1) (2010)
Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki
A Compact FPGA Implementation of the SHA-3 Candidate ECHO. IACR Cryptol. ePrint Arch. 2010 (2010)
Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki
Compact Implementations of BLAKE-32 and BLAKE-64 on FPGA. IACR Cryptol. ePrint Arch. 2010 (2010)
Diego F. Aranha, Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals
Optimal Eta Pairing on Supersingular Genus-2 Binary Hyperelliptic Curves. IACR Cryptol. ePrint Arch. 2010 (2010)
Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez
Pairing over Small-Characteristic Supersingular Elliptic Curves. IACR Cryptol. ePrint Arch. 2009 (2009)
Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez
Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves. CANS (2009)
Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. CHES (2009)
Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. IACR Cryptol. ePrint Arch. 2009 (2009)
Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez
Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves. IACR Cryptol. ePrint Arch. 2009 (2009)
Jean-Luc Beuchat, Jean-Michel Muller
Automatic Generation of Modular Multipliers for FPGA Applications. IEEE Trans. Computers 57 (12) (2008)
Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, Hiroyasu Yamamoto
Pairing in Characteristic Three. IACR Cryptol. ePrint Arch. 2008 (2008)
Nidia Cortez-Duarte, Francisco Rodríguez-Henríquez, Jean-Luc Beuchat, Eiji Okamoto
) Amenable for Pairing Computation. IACR Cryptol. ePrint Arch. 2008 (2008)
Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Francisco Rodríguez-Henríquez
. Pairing (2008)
Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Francisco Rodríguez-Henríquez
. IACR Cryptol. ePrint Arch. 2008 (2008)
Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Masaaki Shirase, Tsuyoshi Takagi
Algorithms and Arithmetic Operators for Computing the etaT Pairing in Characteristic Three. IEEE Trans. Computers 57 (11) (2008)
Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto
Arithmetic Operators for Pairing-Based Cryptography. IACR Cryptol. ePrint Arch. 2007 (2007)
Jean-Luc Beuchat, Nicolas Brisebarre, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto
Pairing in Characteristic Three. WAIFI (2007)
Jean-Luc Beuchat, Nicolas Brisebarre, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto
Pairing in Characteristic Three. IACR Cryptol. ePrint Arch. 2007 (2007)
Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto
Arithmetic Operators for Pairing-Based Cryptography. CHES (2007)
Jean-Luc Beuchat, Takanori Miyoshi, Yoshihito Oyama, Eiji Okamoto
on FPGA: A Survey. ARC (2007)
Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Masaaki Shirase, Tsuyoshi Takagi
Pairing in Characteristic Three. IACR Cryptol. ePrint Arch. 2007 (2007)
Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto
An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation. IEEE Symposium on Computer Arithmetic (2007)
Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto
Pairing Calculation in Characteristic Three. IACR Cryptol. ePrint Arch. 2007 (2007)
Jean-Luc Beuchat
Further Comments on "Residue-to-Binary Converters Based on New Chinese Remainder Theorems" CoRR (2007)
Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto
Pairing Calculation in Characteristic Three and its Hardware Implementation. IACR Cryptol. ePrint Arch. 2006 (2006)
Jean-Luc Beuchat, Jean-Michel Muller
Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement. ASAP (2005)
Jean-Luc Beuchat, Arnaud Tisserand
Évaluation polynomiale en-ligne de fonctions élémentaires sur FPGA. Tech. Sci. Informatiques 23 (10) (2004)
Jean-Luc Beuchat
FPGA Implementations of the RC6 Block Cipher. FPL (2003)
Jean-Luc Beuchat
Modular Multiplication for FPGA Implementation of the IDEA Block Cipher. ASAP (2003)
Jean-Luc Beuchat
Some Modular Adders and Multipliers for Field Programmable Gate Arrays. IPDPS (2003)
Jean-Luc Beuchat, Jacques-Olivier Haenni, Héctor Fabio Restrepo, Christof Teuscher, Francisco J. Gómez, Eduardo Sanchez
Approches matérielles et logicielles de l'algorithme de chiffrement IDEA. Tech. Sci. Informatiques 21 (2) (2002)
Jean-Luc Beuchat, Arnaud Tisserand
Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices. FPL (2002)
Jean-Luc Beuchat, Jacques-Olivier Haenni
Von Neumann's 29-state cellular automaton: a hardware implementation. IEEE Trans. Educ. 43 (3) (2000)
Jean-Luc Beuchat, Eduardo Sanchez
An On-Line Arithmetic-Based Reconfigurable Neuroprocessor. IPPS/SPDP Workshops (1999)
Eduardo Sanchez, Moshe Sipper, Jacques-Olivier Haenni, Jean-Luc Beuchat, André Stauffer, Andrés Pérez-Uribe
Static and Dynamic Configurable Systems. IEEE Trans. Computers 48 (6) (1999)
Jean-Luc Beuchat, Eduardo Sanchez
Using On-Line Arithmetic and Reconfiguration for Neuroprocessor Implementations. IWANN (2) (1999)
Jean-Luc Beuchat, Jacques-Olivier Haenni, Eduardo Sanchez
Hardware Reconfigurable Neural Networks. IPPS/SPDP Workshops (1998)
Jacques-Olivier Haenni, Jean-Luc Beuchat, Eduardo Sanchez
RENCO: A Reconfigurable Network Computer. FCCM (1998)