Julio Villalba-Moreno

Publication Activity (10 Years)

Years Active: 2012-2020
Publications (10 Years): 7

Top Topics

Digital Computer

Instruction Set

Interval Arithmetic

Top Venues

IEEE Trans. Computers

Publications

Javier Hormigo, Julio Villalba-Moreno, Sonia Gonzalez-Navarro
Floating-Point Fused Multiply-Add under HUB Format. ARITH (2020)
Julio Villalba-Moreno, Javier Hormigo, Francisco J. Jaime
Reproducible Summation Under HUB Format. ARITH (2019)
Julio Villalba-Moreno, Javier Hormigo, Sonia González-Navarro
Unbiased Rounding for HUB Floating-Point Addition. IEEE Trans. Computers 67 (9) (2018)
Julio Villalba-Moreno, Javier Hormigo
Floating Point Square Root under HUB Format. ICCD (2017)
Javier Hormigo, Jean-Michel Muller, Stuart F. Oberman, Nathalie Revol, Arnaud Tisserand, Julio Villalba-Moreno
Introduction to the Special Issue on Computer Arithmetic. IEEE Trans. Computers 66 (12) (2017)
Julio Villalba-Moreno
Digit Recurrence Floating-Point Division under HUB Format. ARITH (2016)
Carlos Garcia-Vega, Sonia González-Navarro, Pedro Balboa-La Chica, Julio Villalba-Moreno
Decimal Multiformat Online Addition. IEEE Trans. Computers 65 (10) (2016)
Álvaro Vázquez, Julio Villalba-Moreno, Elisardo Antelo, Emilio L. Zapata
Redundant Floating-Point Decimal CORDIC Algorithm. IEEE Trans. Computers 61 (11) (2012)
Carlos Garcia-Vega, Sonia González-Navarro, Julio Villalba-Moreno, Emilio L. Zapata
On-line Decimal Adder with RBCD Representation. ASAP (2012)