Diagnosis of Gate Delay Faults in the Presence of Clock Delay Faults.
Yoshinobu HigamiHiroshi TakahashiShin-ya KobayashiKewal K. SalujaPublished in: ISVLSI (2014)
Keyphrases
- fault diagnosis
- model based diagnosis
- fault detection
- multiple faults
- fault detection and diagnosis
- fault detection and isolation
- fault model
- test cases
- high speed
- root cause
- critical path
- processor sharing
- fault isolation
- expert systems
- genetic algorithm
- fault models
- neural network
- fault identification
- industrial processes
- fault localization
- sensor networks
- artificial intelligence