SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects.
Qiang XuYubin ZhangKrishnendu ChakrabartyPublished in: ACM Trans. Design Autom. Electr. Syst. (2009)
Keyphrases
- hardware software co design
- test cases
- hw sw
- hardware and software
- embedded systems
- software testing
- hardware software
- test data
- test generation
- test suite
- test sequences
- mutation testing
- design methodology
- fault diagnosis
- joint optimization
- optimization problems
- non stationary
- field programmable gate array
- test data generation
- input output
- high frequency
- signal processing
- test set
- management system
- optimization method
- optimization algorithm
- fault detection
- wavelet analysis
- statistical tests
- testing process
- object oriented
- built in self test
- integrity constraints
- software architecture
- wavelet transform
- neural network