Zhenyu Liu

Publication Activity (10 Years)

Years Active: 2005-2019
Publications (10 Years): 23

Top Topics

Vlsi Architecture

Top Venues

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

Publications

Xiaocong Lian, Zhenyu Liu, Zhourui Song, Jiwu Dai, Wei Zhou, Xiangyang Ji
High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. 27 (8) (2019)
Zhenyu Liu, Libo Wang, Xiaobo Li, Xiangyang Ji
Optimize x265 Rate Control: An Exploration of Lookahead in Frame Bit Allocation and Slice Type Decision. IEEE Trans. Image Process. 28 (5) (2019)
Heshan Zhang, Zhenyu Liu, Guanwen Zhang, Jiwu Dai, Xiaocong Lian, Wei Zhou, Xiangyang Ji
A Block-Floating-Point Arithmetic Based FPGA Accelerator for Convolutional Neural Networks. GlobalSIP (2019)
Zhourui Song, Zhenyu Liu, Dongsheng Wang
Computation Error Analysis of Block Floating Point Arithmetic Oriented Convolution Neural Network Accelerator Design. AAAI (2018)
Liangliang Chang, Zhenyu Liu, Libo Wang, Xiaobo Li
Enhance the HEVC Fast Intra CU Mode Decision Based on Convolutional Neural Network by Corner Power Estimation. DCC (2018)
Zhenyu Liu, Libo Wang, Xiaobo Li
Rate Control Optimization of X265 Using Information from Quarter-Resolution Pre-Motion-Estimation. ICIP (2018)
Yunpeng Li, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
CNN Based CU Partition Mode Decision Algorithm for HEVC Inter Coding. ICIP (2018)
Xiaocong Lian, Zhenyu Liu, Wei Zhou, Zhemin Duan
Parallel Content-Aware Adaptive Quantization-Oriented Lossy Frame Memory Recompression for HEVC. IEEE Trans. Circuits Syst. Video Technol. 28 (4) (2018)
Yue Niu, Zhenyu Liu, Chunsheng Mei, Xiangyang Ji, Wei Zhou, Dongsheng Wang
Sensitivity-based acceleration and compression algorithm for convolution neural network. GlobalSIP (2017)
Chunsheng Mei, Zhenyu Liu, Yue Niu, Xiangyang Ji, Wei Zhou, Dongsheng Wang
A 200MHZ 202.4GFLOPS@10.8W VGG16 accelerator in Xilinx VX690T. GlobalSIP (2017)
Nan Song, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
CNN oriented fast PU mode decision for HEVC hardwired intra encoder. GlobalSIP (2017)
Liangliang Chang, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
Coding sensitive based approximation algorithm for power efficient VBS-DCT VLSI design in HEVC hardwired Intra encoder. ICIP (2017)
Zhourui Song, Zhenyu Liu, Chunlu Wang, Dongsheng Wang
Computation Error Analysis of Block Floating Point Arithmetic Oriented Convolution Neural Network Accelerator Design. CoRR (2017)
Peiqi Wang, Zhenyu Liu, Haixia Wang, Dongsheng Wang
Data-centric computation mode for convolution in deep neural networks. IJCNN (2017)
Xiaocong Lian, Zhenyu Liu, Wei Zhou, Zhemin Duan
Lossless Frame Memory Compression Using Pixel-Grain Prediction and Dynamic Order Entropy Coding. IEEE Trans. Circuits Syst. Video Technol. 26 (1) (2016)
Gaoxing Chen, Zhenyu Liu, Tetsunori Kobayashi, Takeshi Ikenaga
Multi-feature based fast depth decision in HEVC inter prediction for VLSI implementation. CISP-BMEI (2016)
Zhenyu Liu, Xianyu Yu, Shaolin Chen, Dongsheng Wang
CNN oriented fast HEVC intra CU mode decision. ISCAS (2016)
Xin Zhou, Xiaocong Lian, Wei Zhou, Zhenyu Liu, Xiu Zhang
A low power lossy frame memory recompression algorithm. APSIPA (2016)
Wei Zhou, Jingzhi Zhang, Xin Zhou, Zhenyu Liu, Xiaoxiang Liu
A High-Throughput and Multi-Parallel VLSI Architecture for HEVC Deblocking Filter. IEEE Trans. Multim. 18 (6) (2016)
Yuan Gao, Zhenyu Liu, Dongsheng Wang
Error models of finite word length arithmetic in CNN accelerator design. VCIP (2016)
Yunpeng Li, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
HEVC fast FME algorithm using IME RD-costs based error surface fitting scheme. VCIP (2016)
Zhenyu Liu, Xianyu Yu, Yuan Gao, Shaolin Chen, Xiangyang Ji, Dongsheng Wang
CU Partition Mode Decision for HEVC Hardwired Intra Encoder Using Convolution Neural Network. IEEE Trans. Image Process. 25 (11) (2016)
Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
Hardware Oriented Enhanced Category Determination Based on CTU Boundary Deblocking Strength Prediction for SAO in HEVC Encoder. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2016)
Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
Deblocking strength prediction based CTU-level SAO category determination in HEVC encoder. VCIP (2015)
Xiaocong Lian, Zhenyu Liu, Wei Zhou, Zhemin Duan
Pixel-grain prediction and K-order UEG-rice entropy coding oriented lossless frame memory compression for motion estimation in HEVC. ICIP (2015)
Xianyu Yu, Zhenyu Liu, Junjie Liu, Yuan Gao, Dongsheng Wang
VLSI friendly fast CU/PU mode decision for HEVC intra encoding: Leveraging convolution neural network. ICIP (2015)
Guohong Li, Olivier Temam, Zhenyu Liu, Sanchuan Guo, Dongsheng Wang
Cluster Cache Monitor: Leveraging the Proximity Data in CMP. Int. J. Parallel Program. 43 (6) (2015)
Wei Zhou, Xin Zhou, Xiaocong Lian, Zhenyu Liu, Xiaoxiang Liu
An efficient interpolation filter VLSI architecture for HEVC standard. EURASIP J. Adv. Signal Process. 2015 (2015)
Jia Zhu, Zhenyu Liu, Dongsheng Wang, Qingrui Han, Yang Song
HDTV1080p HEVC Intra encoder with source texture based CU/PU mode pre-decision. ASP-DAC (2014)
Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
Hardware oriented category pre-determination algorithm for SAO in HEVC. APSIPA (2014)
Zhenyu Liu, Sanchuan Guo, Dongsheng Wang
Binary classification based linear rate estimation model for HEVC RDO. ICIP (2014)
Sanchuan Guo, Zhenyu Liu, Dongsheng Wang, Qingrui Han, Yang Song
Linear Rate Estimation Model for HEVC RDO Using Binary Classification Based Regression. DCC (2014)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
A Mode Mapping and Optimized MV Conjunction Based H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability for Videoconferencing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2014)
Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
Low complexity SAO in HEVC base on class combination, pre-decision and merge separation. DSP (2014)
Gaoxing Chen, Lei Sun, Zhenyu Liu, Takeshi Ikenaga
Fast Mode and Depth Decision for HEVC Intra Prediction Based on Edge Detection and Partition Reconfiguration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2014)
Longshan Du, Zhenyu Liu, Takeshi Ikenaga, Dongsheng Wang
Linear adaptive search range model for uni-prediction and motion analysis for bi-prediction in HEVC. ICIP (2014)
Sanchuan Guo, Zhenyu Liu, Guohong Li, Takeshi Ikenaga, Dongsheng Wang
Content-Aware Write Reduction Mechanism of 3D Stacked Phase-Change RAM Based Frame Store in H.264 Video Codec System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2013)
Jia Zhu, Zhenyu Liu, Dongsheng Wang, Qingrui Han, Yang Song
Fast prediction mode decision with hadamard transform based rate-distortion cost estimation for HEVC intra coding. ICIP (2013)
Jia Zhu, Zhenyu Liu, Dongsheng Wang
Fully pipelined DCT/IDCT/Hadamard unified transform architecture for HEVC Codec. ISCAS (2013)
Gaoxing Chen, Lei Sun, Zhenyu Liu, Takeshi Ikenaga
Fast mode and depth decision HEVC intra prediction based on edge detection and partitioning reconfiguration. ISPACS (2013)
Gaoxing Chen, Zhenyu Pei, Lei Sun, Zhenyu Liu, Takeshi Ikenaga
Fast intra prediction for HEVC based on pixel gradient statistics and mode refinement. ChinaSIP (2013)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
A Low-Complexity Quantization-Domain H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability. MMM (1) (2013)
Sanchuan Guo, Zhenyu Liu, Guohong Li, Dongsheng Wang
Content-aware write reduction mechanism of phase-change RAM based Frame Store in H.264 Video codec system. ISCAS (2013)
Zhenyu Liu, Dongsheng Wang, Hongxiang Zhu, Xiaodong Huang
41.7BN-pixels/s reconfigurable intra prediction architecture for HEVC 2560×1600 encoder. ICASSP (2013)
Guohong Li, Olivier Temam, Zhenyu Liu, Dongsheng Wang, Sanchuan Guo
Cluster Cache Monitor. SBAC-PAD (2013)
Xi Zhang, Chuanyi Liu, Zhenyu Liu, Dongsheng Wang
Improving Cache Partitioning Algorithms for Pseudo-LRU Policies. IEICE Trans. Inf. Syst. (12) (2013)
Guohong Li, Zhenyu Liu, Sanchuan Guo, Chongmin Li, Dongsheng Wang
Bayesian theory oriented Optimal Data-Provider Selection for CMP. ICCD (2013)
Genxian Liu, Xi Zhang, Dongsheng Wang, Zhenyu Liu, Haixia Wang
Security Memory System for Mobile Device or Computer Against Memory Attacks. ISCTCS (2013)
Guang Chen, Zhenyu Liu, Takeshi Ikenaga, Dongsheng Wang
Fast HEVC intra mode decision using matching edge detector and kernel density estimation alike histogram generation. ISCAS (2013)
Guohong Li, Zhenyu Liu, Sanchuan Guo, Dongsheng Wang
Bayesian Theory Based Adaptive Proximity Data Accessing for CMP Caches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2013)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
Low-Complexity Hybrid-Domain H.264/SVC to H.264/AVC Spatial Transcoding with Drift Compensation for Videoconferencing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2013)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
A mode-mapping and optimized MV conjunction based MGS-scalable SVC to AVC IPPP transcoder. ISCAS (2013)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
A Drift-Constrained Frequency-Domain Ultra-Low-Delay H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability for Videoconferencing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2013)
Zhenyu Liu, Dongsheng Wang, Junwei Zhou, Takeshi Ikenaga
Lagrangian multiplier optimization using correlations in residues. ICASSP (2012)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
A pixel-domain mode-mapping based SVC-to-AVC transcoder with coarse grain quality scalability. ICPR (2012)
Lei Sun, Zhenyu Liu, Takeshi Ikenaga
A Videoconferencing-Oriented Hybrid-Domain H.264/SVC to H.264/AVC Spatial Transcoder. PCM (2012)
Zhenyu Liu, Dongsheng Wang, Junwei Zhou, Takeshi Ikenaga
Lagrangian Multiplier Optimization Using Markov Chain Based Rate and Piecewise Approximated Distortion Models. DCC (2012)
Sanchuan Guo, Zhenyu Liu, Dongsheng Wang, Haixia Wang, Guohong Li
Wear-Resistant Hybrid Cache Architecture with Phase Change Memory. NAS (2012)
Zhenyu Liu, Dongsheng Wang
One-round renormalization based 2-bin/cycle H.264/AVC CABAC encoder. ICIP (2011)
Xi Zhang, Chongmin Li, Zhenyu Liu, Haixia Wang, Dongsheng Wang, Takeshi Ikenaga
A Novel Cache Replacement Policy via Dynamic Adaptive Insertion and Re-Reference Prediction. IEICE Trans. Electron. (4) (2011)
Zhenyu Liu, Junwei Zhou, Dongsheng Wang, Takeshi Ikenaga
Register Length Analysis and VLSI Optimization of VBS Hadamard Transform in H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. 21 (5) (2011)
Zhenyu Liu, Dongsheng Wang, Takeshi Ikenaga
Architecture and Circuit Optimization of Hardwired Integer Motion Estimation Engine for H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2010)
Zhenyu Liu, Dongsheng Wang, Takeshi Ikenaga
Hardware optimizations of variable block size Hadamard transform for H.264/AVC FRExt. ICIP (2009)
Zhenyu Liu, Junwei Zhou, Satoshi Goto, Takeshi Ikenaga
Motion Estimation Optimization for H.264/AVC Using Source Image Edge Features. IEEE Trans. Circuits Syst. Video Technol. 19 (8) (2009)
Zhenyu Liu, Yang Song, Ming Shao, Shen Li, Lingfeng Li, Shunichi Ishiwata, Masaki Nakagawa, Satoshi Goto, Takeshi Ikenaga
HDTV1080p H.264/AVC Encoder Chip Design and Performance Analysis. IEEE J. Solid State Circuits 44 (2) (2009)
Yiqing Huang, Zhenyu Liu, Yang Song, Satoshi Goto, Takeshi Ikenaga
Parallel Improved HDTV720p Targeted Propagate Partial SAD Architecture for Variable Block Size Motion Estimation in H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2008)
Yang Song, Yao Ma, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
Hardware-oriented direction-based fast fractional motion estimation algorithm in H.264/AVC. ICME (2008)
Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
Content-Aware Fast Motion Estimation for H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2008)
Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
Optimization of Propagate Partial SAD and SAD tree motion estimation hardwired engine for H.264. ICCD (2008)
Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
Fast motion estimation for H.264/AVC using image edge features. ICME (2008)
Zhenyu Liu, Lingfeng Li, Yang Song, Shen Li, Satoshi Goto, Takeshi Ikenaga
Motion Feature and Hadamard Coefficient-Based Fast Multiple Reference Frame Motion Estimation for H.264. IEEE Trans. Circuits Syst. Video Technol. 18 (5) (2008)
Yang Song, Ming Shao, Zhenyu Liu, Shen Li, Lingfeng Li, Takeshi Ikenaga, Satoshi Goto
H.264/AVC Fractional Motion Estimation Engine with Computation Reusing in HDTV1080P Real-Time Encoding Applications. SiPS (2007)
Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2007)
Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
Low-Power Partial Distortion Sorting Fast Motion Estimation Algorithms and VLSI Implementations. IEICE Trans. Inf. Syst. (1) (2007)
Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga
VLSI friendly edge gradient detection based multiple reference frames motion estimation optimization for H.264/AVC. EUSIPCO (2007)
Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga
Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC. ACM Great Lakes Symposium on VLSI (2007)
Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation. ISCAS (2007)
Zhenyu Liu, Yang Song, Ming Shao, Shen Li, Lingfeng Li, Satoshi Goto, Takeshi Ikenaga
32-Parallel SAD Tree Hardwired Engine for Variable Block Size Motion Estimation in HDTV1080P Real-Time Encoding Application. SiPS (2007)
Ming Shao, Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2007)
Zhenyu Liu, Lingfeng Li, Yang Song, Takeshi Ikenaga, Satoshi Goto
VLSI Oriented Fast Multiple Reference Frame Motion Estimation Algorithm for H.264/AVC. ICME (2007)
Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
Ultra Low-Complexity Fast Variable Block Size Motion Estimation Algorithm in H.264/AVC. ICME (2007)
Yang Song, Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2006)
Yang Song, Takeshi Ikenaga, Satoshi Goto, Zhenyu Liu
Enhanced Partial Distortion Sorting Fast Motion Estimation Algorithm for Low-Power Applications. APCCAS (2006)
Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
A VLSI Architecture for Variable Block Size Motion Estimation in H.264/AVC with Low Cost Memory Organization. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
Low-Pass Filter Based Vlsi Oriented Variable Block Size Motion Estimation Algorithm for H.264. ICASSP (2) (2006)
Kouichi Kumagai, Changqi Yang, Hitoshi Izumino, Nobuyuki Narita, Keisuke Shinjo, Shin-ichi Iwashita, Yuji Nakaoka, Tomohiro Kawamura, Hideo Komabashiri, Tsukasa Minato, Atsushi Ambo, Takamasa Suzuki, Zhenyu Liu, Yang Song, Satoshi Goto, Takeshi Ikenaga, Yoshihiro Mabuchi, Kenji Yoshida
System-in-silicon architecture and its application to H.264/AVC motion estimation for 1080HDTV. ISSCC (2006)
Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
A Fine-Grain Scalable and Low Memory Cost Variable Block Size Motion Estimation Architecture for H.264/AVC. IEICE Trans. Electron. (12) (2006)
Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
A VLSI array processing oriented fast fourier transform algorithm and hardware implementation. ACM Great Lakes Symposium on VLSI (2005)
Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
A VLSI Array Processing Oriented Fast Fourier Transform Algorithm and Hardware Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2005)