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An efficient interpolation filter VLSI architecture for HEVC standard.
Wei Zhou
Xin Zhou
Xiaocong Lian
Zhenyu Liu
Xiaoxiang Liu
Published in:
EURASIP J. Adv. Signal Process. (2015)
Keyphrases
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vlsi architecture
low complexity
interpolation filter
vlsi implementation
motion compensation
motion compensated
real time
mode decision
video coding standard
intra prediction
computational complexity
low power
standard deviation
video compression