Login / Signup
Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC.
Zhenyu Liu
Yiqing Huang
Yang Song
Satoshi Goto
Takeshi Ikenaga
Published in:
ACM Great Lakes Symposium on VLSI (2007)
Keyphrases
</>
variable block size motion estimation
real time
motion vectors
hardware implementation
block size
variable block size
video sequences
motion compensation
efficient implementation
motion estimation