41.7BN-pixels/s reconfigurable intra prediction architecture for HEVC 2560×1600 encoder.
Zhenyu LiuDongsheng WangHongxiang ZhuXiaodong HuangPublished in: ICASSP (2013)
Keyphrases
- intra prediction
- mode decision
- spatial correlation
- video compression
- pixel wise
- macroblock
- rate distortion optimization
- avc video coding
- avc intra
- coding efficiency
- intra coding
- bit rate
- mode selection
- rate distortion
- temporal correlation
- low complexity
- video coding
- motion estimation
- video coding standard
- motion compensation
- prediction mode
- video codec
- variable block size
- video transmission
- motion vectors
- block size
- visual quality
- reference frame
- distributed video coding
- inter frame
- low bit rate
- video conferencing
- computational complexity
- motion compensated
- error propagation
- image coding
- input image
- bit allocation
- transform domain
- multimedia
- bitstream
- image blocks