Xuan-Lun Huang

Publication Activity (10 Years)

Years Active: 2009-2020
Publications (10 Years): 1

Top Topics

Hardware Software Partitioning

Camera Parameters

Database Administration

Top Venues

J. Electron. Test.

IEEE J. Solid State Circuits

Publications

Xiao Yun Xu, Xuan-Lun Huang, Zhan-Ming Li, Jun Gao, Zhi-Qiang Jiao, Yao Wang, Ruo-Jing Ren, H. P. Zhang, Xian-Min Jin
A Scalable Photonic Computer Solving the Subset Sum Problem. CoRR (2020)
Yu-Yi Chen, Jiun-Lang Huang, Terry Kuo, Xuan-Lun Huang
Design and Implementation of an FPGA-Based Data/Timing Formatter. J. Electron. Test. 31 (5-6) (2015)
Chung-Yun Wang, Yu-Yi Chen, Jiun-Lang Huang, Xuan-Lun Huang
FPGA-Based Subset Sum Delay Lines. ATS (2014)
Ming-Feng Huang, Ming-Ching Kuo, Tzu-Yi Yang, Xuan-Lun Huang
A 58.9-dB ACR, 85.5-dB SBA, 5-26-MHz Configurable-Bandwidth, Charge-Domain Filter in 65-nm CMOS. IEEE J. Solid State Circuits 48 (11) (2013)
Xuan-Lun Huang, Jiun-Lang Huang, Hung-I Chen, Chang-Yu Chen, Tseng Kuo-Tsai, Ming-Feng Huang, Yung-Fa Chou, Ding-Ming Kwai
An MCT-Based Bit-Weight Extraction Technique for Embedded SAR ADC Testing and Calibration. J. Electron. Test. 28 (5) (2012)
Xuan-Lun Huang, Ping-Ying Kang, Jiun-Lang Huang, Yung-Fa Chou, Yung-Pin Lee, Ding-Ming Kwai
A Pre- and Post-bond Self-Testing and Calibration Methodology for SAR ADC Array in 3-D CMOS Imager. ETS (2011)
Xuan-Lun Huang, Ping-Ying Kang, Yuan-Chi Yu, Jiun-Lang Huang
Histogram-Based Calibration of Capacitor Mismatch and Comparator Offset for 1-Bit/Stage Pipelined ADCs. J. Electron. Test. 27 (4) (2011)
Xuan-Lun Huang, Jiun-Lang Huang
ADC/DAC Loopback Linearity Testing by DAC Output Offsetting and Scaling. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Xuan-Lun Huang, Ping-Ying Kang, Hsiu-Ming Chang, Jiun-Lang Huang, Yung-Fa Chou, Yung-Pin Lee, Ding-Ming Kwai, Cheng-Wen Wu
A self-testing and calibration method for embedded successive approximation register ADC. ASP-DAC (2011)
Jiun-Lang Huang, Kuo-Yu Chou, Ming-Huan Lu, Xuan-Lun Huang
A robust ADC code hit counting technique. DATE (2010)
Xuan-Lun Huang, Jiun-Lang Huang
An ADC/DAC loopback testing methodology by DAC output offsetting and scaling. VTS (2010)
Chen-Yuan Yang, Xuan-Lun Huang, Jiun-Lang Huang
An On-Chip Integrator Leakage Characterization Technique and Its Application to Switched Capacitor Circuits Testing. Asian Test Symposium (2009)
Xuan-Lun Huang, Chen-Yuan Yang, Jiun-Lang Huang
Diagnosing integrator leakage of single-bit first-order DeltaSigma modulator using DC input. ASP-DAC (2009)