William C. Miller

Publication Activity (10 Years)

Years Active: 1978-2021
Publications (10 Years): 2

Top Topics

Graph Clustering

Outbreak Detection

Cognitive Impairment

Top Venues

Appl. Netw. Sci.

Publications

Dana K. Pasquale, Irene A. Doherty, Peter A. Leone, Ann M. Dennis, Erika Samoff, Constance S. Jones, John Barnhart, William C. Miller
Lost and found: applying network analysis to public health contact tracing for HIV. Appl. Netw. Sci. 6 (1) (2021)
Pooja Viswanathan, Ellen P. Zambalde, Geneviève Foley, Julianne L. Graham, Rosalie Wang, Bikram Adhikari, Alan K. Mackworth, Alex Mihailidis, William C. Miller, Ian M. Mitchell
Intelligent wheelchair control strategies for older adults with cognitive impairment: user attitudes, needs, and preferences. Auton. Robots 41 (3) (2017)
Rashid Rashidzadeh, Majid Ahmadi, William C. Miller
An All-Digital Self-Calibration Method for a Vernier-Based Time-to-Digital Converter. IEEE Trans. Instrum. Meas. 59 (2) (2010)
Rashid Rashidzadeh, Roberto Muscedere, Majid Ahmadi, William C. Miller
A Delay Generation Technique for Narrow Time Interval Measurement. IEEE Trans. Instrum. Meas. 58 (7) (2009)
Rashid Rashidzadeh, Majid Ahmadi, William C. Miller
Test and Measurement of Analog and RF Cores in Mixed-Signal SoC Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (10) (2007)
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
A Low-Power Two-Digit Multi-dimensional Logarithmic Number System Filterbank Architecture for a Digital Hearing Aid. EURASIP J. Adv. Signal Process. 2005 (18) (2005)
Y. Ibrahim, William C. Miller, Graham A. Jullien, Vassil S. Dimitrov
DBNS addition using cellular neural networks. ISCAS (4) (2005)
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range-Addressable Look-Up Tables. IEEE Trans. Computers 54 (3) (2005)
G. M. Howard, Pedram Mokrian, Majid Ahmadi, William C. Miller
Power and delay analysis of 4: 2 compressor cells. ISCAS (4) (2005)
Sazzadur Chowdhury, Majid Ahmadi, William C. Miller
A New Method of Electrostatic Force Modeling for MEMS Sensors and Actuators. ICMENS (2005)
Y. Ibrahim, Graham A. Jullien, William C. Miller
Ultra Low Noise Signed Digit Arithmetic using Cellular Neural Networks. IWSOC (2004)
Sazzadur Chowdhury, Majid Ahmadi, William C. Miller
The Concept of a 3-D Cubic Acoustical Sensor Microarray Cluster for Use in a Hearing Instrument. ICMENS (2004)
Iman Y. Taha, Majid Ahmadi, William C. Miller
A Sigma-Delta Modulator for Digital Hearing Instruments Using 0.18µm CMOS Technology. IWSOC (2004)
Sazzadur Chowdhury, Majid Ahmadi, William C. Miller
Electrical connectivity analysis of a MEMS micropackage. ISCAS (4) (2004)
Mitra Mirhassani, Majid Ahmadi, William C. Miller
A Feed-Forward Time-Multiplexed Neural Network with Mixed-Signal Neuron-Synapse Arrays. VLSI (2003)
Rashid Rashidzadeh, Majid Ahmadi, William C. Miller
A tester-on-chip implementation in 0.18µ CMOS utilizing a MEMS interface. ISCAS (5) (2003)
Minyi Fu, Graham A. Jullien, Vassil S. Dimitrov, Majid Ahmadi, William C. Miller
The Application of 2D Algebraic Integer Encoding to a DCT IP Core. IWSOC (2003)
Jiyi Gu, Majid Ahmadi, William C. Miller
A Low-Voltage Low-Power Digital-Audio Sigma-Delta Modulator in 0.18-µm CMOS. VLSI (2003)
Sazzadur Chowdhury, Majid Ahmadi, William C. Miller
Nonlinear Effects in MEMS Capacitive Microphone Design. ICMENS (2003)
Sazzadur Chowdhury, Majid Ahmadi, William C. Miller
A MEMS custom micropackaging solution. ISCAS (3) (2003)
Javad Haddadnia, Majid Ahmadi, William C. Miller
Multi-features and Multi-stages RBF Neural Network Classifier with Fuzzy Integral in Human Face Recognition. IC-AI (2002)
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables. ASAP (2002)
H. Safiri, Majid Ahmadi, Graham A. Jullien, William C. Miller
A New Algorithm for the Elimination of Common Subexpressions in Hardware Implementation of Digital Filters by Using Genetic Programming. J. VLSI Signal Process. 31 (2) (2002)
Sazzadur Chowdhury, Majid Ahmadi, Graham A. Jullien, William C. Miller
A MEMS socket system for high density SoC interconnection. ISCAS (1) (2002)
Ricardo Andres Aroca, Majid Ahmadi, R. Hashemian, Graham A. Jullien, William C. Miller
A B-s complement continuous valued digit adder. ICECS (2002)
Vassil S. Dimitrov, Jonathan Eskritt, Laurent Imbert, Graham A. Jullien, William C. Miller
The Use of the Multi-Dimensional Logarithmic Number System in DSP Applications. IEEE Symposium on Computer Arithmetic (2001)
H. Safiri, Majid Ahmadi, Graham A. Jullien, William C. Miller
A novel approach based on genetic algorithm for pipelining of recursive filters. ISCAS (2) (2001)
Sazzadur Chowdhury, Majid Ahmadi, Graham A. Jullien, William C. Miller
A MEMS implementation of an acoustical sensor array. ISCAS (2) (2001)
H. Safiri, Majid Ahmadi, Graham A. Jullien, William C. Miller
A New Algorithm for the Elimination of Common Subexpressions in Hardware Implementation of Digital Filters by Using Genetic Programming. ASAP (2000)
Sazzadur Chowdhury, Graham A. Jullien, Majid Ahmadi, William C. Miller
A MEMS micromagnetic actuator for use in a bionic interface. ISCAS (2000)
Idris El-Feghi, Majid Ahmadi, William C. Miller, Maher A. Sid-Ahmed, V. Ramachandran
Design of Stable 3D Recursive Digital Filters Using 3-Variable Very Strictly Hurwitz Polynomial. J. Circuits Syst. Comput. 10 (5-6) (2000)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Complexity and Fast Algorithms for Multiexponentiations. IEEE Trans. Computers 49 (2) (2000)
A. Lee, Majid Ahmadi, Graham A. Jullien, Reza S. Lashkari, William C. Miller
Design of 1-D FIR filters with genetic algorithms. ISSPA (1999)
A. Lee, Majid Ahmadi, Graham A. Jullien, Reza S. Lashkan, William C. Miller
Design of 1-D FIR filters with genetic algorithms. ISCAS (3) (1999)
J. Yang, Majid Ahmadi, Graham A. Jullien, William C. Miller
An in-the-loop training method for VLSI neural networks. ISCAS (5) (1999)
Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
Sensitivity study and improvements on a nonlinear resistive-type neuron circuit. ICECS (1999)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Theory and Applications of the Double-Base Number System. IEEE Trans. Computers 48 (10) (1999)
M. Shahkarami, Graham A. Jullien, William C. Miller
Designing FIR filters with enhanced Fermat ALUs. ISCAS (3) (1999)
Graham A. Jullien, Vassil S. Dimitrov, B. Li, William C. Miller, A. Lee, Majid Ahmadi
A hybrid DBNS processor for DSP computation. ISCAS (1) (1999)
Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
A Low-Variation Nonlinear Neuron Circuit. J. Circuits Syst. Comput. 8 (4) (1998)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
An Algorithm for Modular Exponentiation. Inf. Process. Lett. 66 (3) (1998)
Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
Neural Network Integrated Circuits with Single-Block Mixed Signal Arrays. J. Circuits Syst. Comput. 8 (5-6) (1998)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
A new DCT algorithm based on encoding algebraic integers. ICASSP (1998)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
A residue number system implementation of real orthogonal transforms. IEEE Trans. Signal Process. 46 (3) (1998)
Saeid Sadeghi-Emamchaie, Graham A. Jullien, Vassil S. Dimitrov, William C. Miller
Digital Arithmetic Using Analog Arrays. Great Lakes Symposium on VLSI (1998)
Saeid Sadeghi-Emamchaie, Graham A. Jullien, Vassil S. Dimitrov, William C. Miller
Digital Arithmetic Using Analog Cellular Neural Networks. J. Circuits Syst. Comput. 8 (5-6) (1998)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Theory and applications for a double-base number system. IEEE Symposium on Computer Arithmetic (1997)
Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Algorithms for Multi-Exponentiation Based on Complex Arithmetic. IEEE Symposium on Computer Arithmetic (1997)
Zhongde Wang, Graham A. Jullien, William C. Miller, Jinghong Wang, Sami S. Bizzan
Fast adders using enhanced multiple-output domino logic. IEEE J. Solid State Circuits 32 (2) (1997)
Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
Design and VLSI Implementation of a Unified Synapse-Neuron Architecture. Great Lakes Symposium on VLSI (1996)
Zhongde Wang, Graham A. Jullien, William C. Miller
+1 multiplication. J. VLSI Signal Process. 14 (3) (1996)
Hormoz Djahanshahi, Majid Ahmadi, Graham A. Jullien, William C. Miller
A modular architecture for hybrid VLSI neural networks and its application in a smart photosensor. ICNN (1996)
Zhongde Wang, Graham A. Jullien, William C. Miller
On computing Chebyshev optimal nonuniform interpolation. Signal Process. 51 (3) (1996)
Zhongde Wang, Graham A. Jullien, William C. Miller
A New Design Technique for Column Compression Multipliers. IEEE Trans. Computers 44 (8) (1995)
Wenzhe Luo, Graham A. Jullien, Neil M. Wigley, William C. Miller, Zhongde Wang
An array processor for inner product computations using a Fermat number ALU. ASAP (1995)
Graham A. Jullien, William C. Miller, Roger Grondin, Lino Del Pup, Sami S. Bizzan, Dapeng Zhang
Dynamic computational blocks for bit-level systolic arrays. IEEE J. Solid State Circuits 29 (1) (1994)
Zhongde Wang, Graham A. Jullien, William C. Miller
Comments on "On asymmetrical performance of discrete cosine transform". IEEE Trans. Signal Process. 42 (11) (1994)
P. Zhou, J. C. Czilli, Graham A. Jullien, William C. Miller
Current Input TSPC Latch for High Speed, Complex Switching Trees. ISCAS (1994)
Jiwen Wang, Xiangui Yu, Nan K. Loh, Zuxu Qin, William C. Miller
Solving linear algebraic equations without error. IEEE Signal Process. Lett. 1 (3) (1994)
Zhongde Wang, Graham A. Jullien, William C. Miller
Recursive algorithms for the forward and inverse discrete cosine transform with arbitrary length. IEEE Signal Process. Lett. 1 (7) (1994)
Zhongde Wang, Graham A. Jullien, William C. Miller
The generalized discrete W transform and its application to interpolation. Signal Process. 36 (1) (1994)
June Wang, Zhongde Wang, Graham A. Jullien, William C. Miller
Area-Time Analysis of Carry Lookahead Adders Using Enhanced Multiple Output Domino Logic. ISCAS (1994)
Zhongde Wang, Graham A. Jullien, William C. Miller
A regular recursive algorithm for the discrete sine transform. ICASSP (3) (1994)
Zhongde Wang, Graham A. Jullien, William C. Miller, June Wang
New Concepts for the Design of Carry Lookahaead Adders. ISCAS (1993)
Graham A. Jullien, Neil M. Wigley, William C. Miller
VLSI implementations of number theoretic techniques in signal processing. Integr. 16 (3) (1993)
Xiangui Yu, Nan K. Loh, William C. Miller
A new acceleration technique for the backpropagation algorithm. ICNN (1993)
S. S. Bizzan, Graham A. Jullien, Neil M. Wigley, William C. Miller
Integer mapping architectures for the polynomial ring engine. IEEE Symposium on Computer Arithmetic (1993)
Xiangui Yu, Nan K. Loh, William C. Miller
A new algorithm for training multilayer feedforward neural networks. ISCAS (1993)
Xiangui Yu, Nan K. Loh, William C. Miller
An improved digit-reversal permutation algorithm. Signal Process. 32 (3) (1993)
Dapeng Zhang, Graham A. Jullien, William C. Miller, Earl E. Swartzlander Jr.
Arithmetic for digital neural networks. IEEE Symposium on Computer Arithmetic (1991)
Neil M. Wigley, Graham A. Jullien, Daniel Reaume, William C. Miller
Small moduli replications in the MRRNS. IEEE Symposium on Computer Arithmetic (1991)
Graham A. Jullien, Subir Bandyopadhyay, William C. Miller, Majid Taheri
A low-overhead scheme for testing a bit-level finite ring systolic array. J. VLSI Signal Process. 2 (3) (1990)
Graham A. Jullien, P. D. Bird, J. T. Carr, Majid Taheri, William C. Miller
An efficient bit-level systolic cell design for finite ring digital signal processing applications. J. VLSI Signal Process. 1 (3) (1989)
Majid Taheri, Graham A. Jullien, William C. Miller
High-speed signal processing using systolic arrays over finite rings. IEEE J. Sel. Areas Commun. 6 (3) (1988)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
Implementation of the generalized FIR filter structure using the residue arithmetic. ICASSP (1987)
Majid Taheri, Graham A. Jullien, William C. Miller
Systolic ROM arrays for implementing RNS FIR filters. ICASSP (1987)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
VLSI Modular architectures for complex digital signal processing applications. ICASSP (1987)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
Computation of complex number theoretic transforms using quadratic residue number systems. ICASSP (1986)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
Complex digital signal processing using quadratic residue number systems. IEEE Trans. Acoust. Speech Signal Process. 34 (1) (1986)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
VLSI Implementation of Complex Digitial Signal Processing Structures. IAS (1986)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
The implementation of the generalized Lagrange FIR filter structure defined over finite fields or rings. ICASSP (1986)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
A VLSI array for computing the DFT based on RNS. ICASSP (1986)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
An efficient VLSI adder for DSP architectures based on RNS. ICASSP (1985)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
A VLSI implementation of an FFT/NTT computational unit. ICASSP (1985)
Ramasamy Krishnan, Graham A. Jullien, William C. Miller
Complex digital signal processing using quadratic residue number systems. ICASSP (1985)
Mohsin M. Jamali, Graham A. Jullien, William C. Miller, S. I. Ahmad
Software techniques for programming a general purpose data flow signal processor. ICASSP (1985)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
A systolic (VLSI) array using RNS for digital signal processing applications. ACM Conference on Computer Science (1984)
Mohsin M. Jamali, Graham A. Jullien, William C. Miller, S. I. Ahmad
A real time general purpose signal processor. ICASSP (1984)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
A VLSI model for residue number system architectures. Integr. 2 (3) (1984)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
Models for VLSI implementation of residue number system arithmetic modules. IEEE Symposium on Computer Arithmetic (1983)
Magdy A. Bayoumi, Graham A. Jullien, William C. Miller
An area-time efficient NMOS adder. Integr. 1 (4) (1983)
Hari K. Nagpal, Graham A. Jullien, William C. Miller
Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic. IEEE Trans. Computers 32 (11) (1983)
Hari K. Nagpal, Graham A. Jullien, William C. Miller
Memory architecture of a video-rate image convolver. ICASSP (1982)
Graham A. Jullien, William C. Miller
A two-dimensional finite field processor for image filtering. ICASSP (1981)
Graham A. Jullien, William C. Miller
A hardware realization of an NTT convolver using ROM arrays. ICASSP (1980)
Ben-Dau Tseng, Graham A. Jullien, William C. Miller
Implementation of FFT Structures Using the Residue Number System. IEEE Trans. Computers 28 (11) (1979)
Ben-Dau Tseng, William C. Miller, Graham A. Jullien, J. J. Soltis, A. Baraniecka
An error anaylsis of a FFT implementation using the residue number system. ICASSP (1978)
Graham A. Jullien, William C. Miller
Application of the residue number system to computer processing of digital signals. IEEE Symposium on Computer Arithmetic (1978)
Ben-Dau Tseng, William C. Miller
On Computing the Discrete Cosine Transform. IEEE Trans. Computers 27 (10) (1978)