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Dynamic computational blocks for bit-level systolic arrays.

Graham A. JullienWilliam C. MillerRoger GrondinLino Del PupSami S. BizzanDapeng Zhang
Published in: IEEE J. Solid State Circuits (1994)
Keyphrases
  • dynamic environments
  • neural network
  • scheduling problem
  • lower level
  • image processing
  • genetic algorithm
  • artificial intelligence
  • multiscale
  • evolutionary algorithm
  • computational models
  • variable size