Roberto Muscedere

Publication Activity (10 Years)

Years Active: 1999-2020
Publications (10 Years): 16

Top Topics

Fpga Implementation

Human Face Recognition

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Alexander J. Leigh, Mitra Mirhassani, Roberto Muscedere
An Efficient Spiking Neuron Hardware System Based on the Hardware-Oriented Modified Izhikevich Neuron (HOMIN) Model. ISCAS (2020)
Ali Dianat, Ali Attaran, Roberto Muscedere, Blaine A. Chronik
A Non-Magnetic RF Balun Designed at 128 MHz Centre frequency for 3 T MRI Scanners. CCECE (2020)
Alexander J. Leigh, Mitra Mirhassani, Roberto Muscedere
An Efficient Spiking Neuron Hardware System Based on the Hardware-Oriented Modified Izhikevich Neuron (HOMIN) Model. IEEE Trans. Circuits Syst. (12) (2020)
Ali Dianat, Ali Attaran, Roberto Muscedere, Blaine A. Chronik
PCB Fabricated Passive RF Balun for 3 T MRI Applications. CCECE (2019)
Tareq Muhammad Supon, Mahsasadat Seyedbarhagh, Rashid Rashidzadeh, Roberto Muscedere
Hardware Trojan Prevention Through Limiting Access to the Active Region. DTIS (2019)
Manpreet Kaur, Rashid Rashidzadeh, Roberto Muscedere
Reliability of Physical Unclonable Function under Temperature and Supply Voltage Variations. MWSCAS (2018)
Parham Hosseinzadeh Namin, Crystal Andrea Roma, Roberto Muscedere, Majid Ahmadi
Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
S. Servati Beiragh, Roberto Muscedere
A hardware accelerated proportional text layout and placement engine. CCECE (2017)
Yuan Jing, Bahar Youssefi, Mitra Mirhassani, Roberto Muscedere
An efficient FPGA implementation of Optical Character Recognition for License Plate Recognition. CCECE (2017)
Roberto Muscedere, Mitra Mirhassani
A software tool for generating optimized multipartite table parameters. CCECE (2017)
Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
Using Redundant Representation. IEEE Trans. Circuits Syst. II Express Briefs (11) (2017)
Yahia Ouahab, Rashid Rashidzadeh, Roberto Muscedere
A secure scan chain using a phase locking system and a reconfigurable LFSR. CCECE (2017)
G. Kyrtsakas, Roberto Muscedere
An FPGA implementation of a custom JPEG image decoder SoC module. CCECE (2017)
Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields. IEEE Trans. Very Large Scale Integr. Syst. 25 (5) (2017)
Zheng Wu, Esrafil Jedari, Roberto Muscedere, Rashid Rashidzadeh
Improved particle filter based on WLAN RSSI fingerprinting and smart sensors for indoor localization. Comput. Commun. 83 (2016)
Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
Low power design of a word-level finite field multiplier using Reordered Normal Basis. ACSSC (2015)
Ali Dianat, Ali Attaran, Rashid Rashidzadeh, Roberto Muscedere
Resonant-based test method for MEMS devices. ICECS (2014)
Karl Leboeuf, Roberto Muscedere, Majid Ahmadi
A GPU implementation of the Montgomery multiplication algorithm for elliptic curve cryptography. ISCAS (2013)
Ayesa Parvin, Majid Ahmadi, Roberto Muscedere
Application of neural networks with CSD coefficients for human face recognition. ISCAS (2013)
Karl Leboeuf, Roberto Muscedere, Majid Ahmadi
High performance prime field multiplication for GPU. ISCAS (2012)
Mahzad Azarmehr, Roberto Muscedere
A RISC architecture for 2DLNS-based signal processing. Int. J. High Perform. Syst. Archit. 3 (2/3) (2011)
Sazzadur Chowdhury, Roberto Muscedere, Sundeep Lal
An FPGA-based signal processing system for a 77 GHz MEMS tri-mode automotive radar. International Symposium on Rapid System Prototyping (2011)
Karl Leboeuf, Iman Makaremi, Roberto Muscedere, Majid Ahmadi
Image processing technique for segmenting microstructural porosity of laser-welded thermoplastics. ICECS (2011)
Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi
High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis. IET Circuits Devices Syst. 4 (2) (2010)
Mahzad Azarmehr, Mohammad M. Ahmadi, Graham A. Jullien, Roberto Muscedere
High-speed and low-power reconfigurable architectures of 2-digit two-dimensional logarithmic number system-based recursive multipliers. IET Circuits Devices Syst. 4 (5) (2010)
Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi
Efficient Hardware Implementation of the Hyperbolic Tangent Sigmoid Function. ISCAS (2009)
Rashid Rashidzadeh, Roberto Muscedere, Majid Ahmadi, William C. Miller
A Delay Generation Technique for Narrow Time Interval Measurement. IEEE Trans. Instrum. Meas. 58 (7) (2009)
Anthony C. Karloff, Neil E. Scott, Roberto Muscedere
Flexible real-time cost-effective high-throughput inspection system for pharmaceutical capsules. J. Electronic Imaging 18 (1) (2009)
Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi
High speed VLSI implementation of a finite field multiplier using redundant representation. ECCTD (2009)
Anthony C. Karloff, Roberto Muscedere
A low-cost, real-time, hardware-based image demosaicking algorithm. EIT (2009)
Roberto Muscedere, Karl Leboeuf
A dynamic address decode circuit for implementing range addressable look-up tables. ISCAS (2008)
Roberto Muscedere
Improving 2D-Log-Number-System Representations by Use of an Optimal Base. EURASIP J. Adv. Signal Process. 2008 (2008)
Roberto Muscedere
A Hardware Efficient Very Large Bit Word Binary to Double Base Number System Converter for Encryption Applications. ISCAS (2007)
Mahzad Azarmehr, Roberto Muscedere
A Simple Central Processing Unit with Multi-Dimensional Logarithmic Number System Extensions. ASAP (2007)
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
A Low-Power Two-Digit Multi-dimensional Logarithmic Number System Filterbank Architecture for a Digital Hearing Aid. EURASIP J. Adv. Signal Process. 2005 (18) (2005)
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range-Addressable Look-Up Tables. IEEE Trans. Computers 54 (3) (2005)
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables. ASAP (2002)
Ibrahim Cem Baykal, Roberto Muscedere, Graham A. Jullien
On the use of hash functions for defect detection in textures for in-camera web inspection systems. ISCAS (5) (2002)
S. Hossain Hajimowlana, Roberto Muscedere, Graham A. Jullien, James W. Roberts
Defect detection in web inspection using fuzzy fusion of texture features. ISCAS (2000)
S. Hossain Hajimowlana, Roberto Muscedere, Graham A. Jullien, James W. Roberts
An In-Camera Data Stream Processing System for Defect Detection in Web Inspection Tasks. Real Time Imaging 5 (1) (1999)