Wai-Shing Luk

Publication Activity (10 Years)

Years Active: 1994-2021
Publications (10 Years): 10

Top Topics

Decomposition Methods

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Publications

Jingbo Gao, Yu Qian, Yihan Hu, Xitian Fan, Wai-Shing Luk, Wei Cao, Lingli Wang
LETA: A lightweight exchangeable-track accelerator for efficientnet based on FPGA. FPT (2021)
Yunhui Qiu, Jinyu Xie, Hankun Lv, Wenbo Yin, Wai-Shing Luk, Lingli Wang, Bowei Yu, Hua Chen, Xianjun Ge, Zhijian Liao, Xiaozhong Shi
FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA. IEEE Trans. Parallel Distributed Syst. 31 (8) (2020)
Ye Zhang, Wenlong Lyu, Wai-Shing Luk, Fan Yang, Hai Zhou, Dian Zhou, David Z. Pan, Xuan Zeng
Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26 (9) (2018)
Yunfeng Yang, Wai-Shing Luk, Hai Zhou, David Z. Pan, Dian Zhou, Changhao Yan, Xuan Zeng
An Effective Layout Decomposition Method for DSA with Multiple Patterning in Contact-Hole Generation. ACM Trans. Design Autom. Electr. Syst. 23 (1) (2017)
Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng
Network flow based cut redistribution and insertion for advanced 1D layout design. ASP-DAC (2017)
Yunfeng Yang, Fan Yang, Wai-Shing Luk, Changhao Yan, Xuan Zeng, Xiangdong Hu
Layout decomposition for hybrid E-beam and DSA double patterning lithography. ISCAS (2017)
Yunfeng Yang, Wai-Shing Luk, David Z. Pan, Hai Zhou, Changhao Yan, Dian Zhou, Xuan Zeng
Layout Decomposition Co-Optimization for Hybrid E-Beam and Multiple Patterning Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (9) (2016)
Ye Zhang, Wai-Shing Luk, Yunfeng Yang, Hai Zhou, Changhao Yan, David Z. Pan, Xuan Zeng
Layout Decomposition with Pairwise Coloring and Adaptive Multi-Start for Triple Patterning Lithography. ACM Trans. Design Autom. Electr. Syst. 21 (1) (2015)
Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng, Dian Zhou
Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography. ASP-DAC (2015)
Xingbao Zhou, Wai-Shing Luk, Hai Zhou, Fan Yang, Changhao Yan, Xuan Zeng
Multi-parameter clock skew scheduling. Integr. 48 (2015)
Yanling Zhi, Wai-Shing Luk, Hai Zhou, Xuan Zeng
SmipRef: An efficient method for multi-domain clock skew scheduling. Integr. 46 (4) (2013)
Ye Zhang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng
Layout decomposition with pairwise coloring for multiple patterning lithography. ICCAD (2013)
Yanling Zhi, Wai-Shing Luk, Yi Wang, Changhao Yan, Xuan Zeng
Yield-Driven Clock Skew Scheduling for Arbitrary Distributions of Critical Path Delays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2012)
Yanling Zhi, Wai-Shing Luk, Hai Zhou, Changhao Yan, Hengliang Zhu, Xuan Zeng
An efficient algorithm for multi-domain clock skew scheduling. DATE (2011)
Wai-Shing Luk, Huiping Huang
Fast and lossless graph division method for layout decomposition using SPQR-tree. ICCAD (2010)
Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng
Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2009)
Qiang Fu, Wai-Shing Luk, Jun Tao, Xuan Zeng, Wei Cai
Intra-Die Spatial Correlation Extraction with Maximum Likelihood Estimation Method for Multiple Test Chips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2009)
Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng
Characterizing Intra-Die Spatial Correlation Using Spectral Density Method. ISQED (2008)
Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong, Wei Cai, Jia Ni
Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. DAC (2008)
Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng
Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic. ASP-DAC (2007)
Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng
WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. ASP-DAC (2007)
Tien-Tsin Wong, Wai-Shing Luk, Pheng-Ann Heng
Sampling with Hammersley and Halton Points. J. Graphics, GPU, & Game Tools 2 (2) (1997)
Wai-Shing Luk, Tien-Tsin Wong
Two New Quorum Based Algorithms for Distributed Mutual Exclusion. ICDCS (1997)
Wai-Shing Luk, Omar Wing
Waveform Krylov Subspace Methods on a Massively Parallel Computer. Int. J. High Speed Comput. 9 (1) (1997)
Wai-Shing Luk, Omar Wing
The Use of Inexact ODE Solver in Waveform Relaxation Methods on a Massively Parallel Computer. PPSC (1995)
Tien Chi Chen, Wai-Shing Luk
Aberth's Method for the Parallel Iterative Finding of Polynomial Zeros. APL (1994)