Xitian Fan

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 9

Top Topics

Image Recognition

Hardware Architecture

Hardware Implementation

Convolutional Neural Networks

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Tianyang Li, Fan Zhang, Xitian Fan, Jianliang Shen, Wei Guo, Wei Cao
Unified Accelerator for Attention and Convolution in Inference Based on FPGA. ISCAS (2023)
Xitian Fan, Guangwei Xie, Zhongcheng Huang, Wei Cao, Lingli Wang
Acceleration of Rotated Object Detection on FPGA. IEEE Trans. Circuits Syst. II Express Briefs 69 (4) (2022)
Siyu Xiong, Guoqing Wu, Xitian Fan, Xuan Feng, Zhongcheng Huang, Wei Cao, Xuegong Zhou, Shijin Ding, Jinhua Yu, Lingli Wang, Zhifeng Shi
MRI-based brain tumor segmentation using FPGA-accelerated neural network. BMC Bioinform. 22 (1) (2021)
Jingbo Gao, Yu Qian, Yihan Hu, Xitian Fan, Wai-Shing Luk, Wei Cao, Lingli Wang
LETA: A lightweight exchangeable-track accelerator for efficientnet based on FPGA. FPT (2021)
Di Wu, Xitian Fan, Wei Cao, Lingli Wang
SWM: A High-Performance Sparse-Winograd Matrix Multiplication CNN Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 29 (5) (2021)
Liang Xie, Xitian Fan, Wei Cao, Lingli Wang
High Throughput CNN Accelerator Design Based on FPGA. FPT (2018)
Xitian Fan, Di Wu, Wei Cao, Wayne Luk, Lingli Wang
Stream Processing Dual-Track CGRA for Object Inference. IEEE Trans. Very Large Scale Integr. Syst. 26 (6) (2018)
Xitian Fan, Huimin Li, Wei Cao, Lingli Wang
DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications. FPL (2016)
Huimin Li, Xitian Fan, Li Jiao, Wei Cao, Xuegong Zhou, Lingli Wang
A high performance FPGA-based accelerator for large-scale convolutional neural networks. FPL (2016)
Shengye Wang, Chen Liang, Xuegong Zhou, Wei Cao, Chenlu Wu, Xitian Fan, Lingli Wang
A hardware implementation of Bag of Words and Simhash for image recognition. FPT (2013)
Xitian Fan, Chenlu Wu, Wei Cao, Xuegong Zhou, Shengye Wang, Lingli Wang
Implementation of high performance hardware architecture of OpenSURF algorithm on FPGA. FPT (2013)