Sudhir M. Gowda

Publication Activity (10 Years)

Years Active: 1991-2006
Publications (10 Years): 0

Publications

John F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, Lei Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman
A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology. IEEE J. Solid State Circuits 41 (12) (2006)
Mounir Meghelli, Sergey V. Rylov, John F. Bulzacchelli, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, L. Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman
A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS. ISSCC (2006)
Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna
10+ gb/s 90-nm CMOS serial link demo in CBGA package. IEEE J. Solid State Circuits 40 (9) (2005)
Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna
10+ Gb/s 90nm CMOS serial link demo in CBGA package. CICC (2004)
Hui Wu, José A. Tierno, Petar K. Pepeljugoski, Jeremy Schaub, Sudhir M. Gowda, Jeffrey A. Kash, Ali Hajimiri
Integrated transversal equalizers in high-speed fiber-optic systems. IEEE J. Solid State Circuits 38 (12) (2003)
Woogeun Rhee, Herschel A. Ainspan, Sergey V. Rylov, Alexander V. Rylyakov, Michael P. Beakes, Daniel J. Friedman, Sudhir M. Gowda, Mehmet Soyuer
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop. CICC (2003)
Hyun J. Shin, Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner
Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications. IBM J. Res. Dev. 39 (1-2) (1995)
Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner, Michael Immediato, Richard L. Galbraith, Hyun J. Shin
Digital FIR filters for high speed PRML disk read channels. IEEE J. Solid State Circuits 30 (12) (1995)
Sudhir M. Gowda, Bing J. Sheu, Wen-Jay Hsu
Testing of programmable analog neural network chips. J. VLSI Signal Process. 8 (3) (1994)
Sudhir M. Gowda, Bing J. Sheu
BSIM plus: an advanced SPICE model for submicron MOS VLSI circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (9) (1994)
Wen-Jay Hsu, Bing J. Sheu, Sudhir M. Gowda
Testing of Analog Neural Array-Processor Chips. ICCD (1991)