Shuzo Yajima

Publication Activity (10 Years)

Years Active: 1965-2001
Publications (10 Years): 0

Publications

Yasuhiko Takenaga, Kouji Nakajima, Shuzo Yajima
Tree-shellability of Boolean functions. Theor. Comput. Sci. 262 (1) (2001)
Yasuhiko Takenaga, Shuzo Yajima
Hardness of identifying the minimum ordered binary decision diagram. Discret. Appl. Math. 107 (1-3) (2000)
Kazuo Iwama, Mitsushi Nouzoe, Shuzo Yajima
Optimizing OBDDs Is Still Intractable for Monotone Functions. MFCS (1998)
Kazuhisa Hosaka, Yasuhiko Takenaga, T. Kaneda, Shuzo Yajima
Size of Ordered Binary Decision Diagrams Representing Threshold Functions. Theor. Comput. Sci. 180 (1-2) (1997)
Takashi Horiyama, Shuzo Yajima
Exponential Lower Bounds on the Size of OBDDs Representing Integer Divistion. ISAAC (1997)
Masayuki Ito, Naofumi Takagi, Shuzo Yajima
Efficient Initial Approximation for Multiplicative Division and Square Root by a Multiplication with Operand Modification. IEEE Trans. Computers 46 (4) (1997)
Takafumi Hamano, Naofumi Takagi, Shuzo Yajima, Franco P. Preparata
O(n)-Depth Modular Exponentiation Circuit Algorithm. IEEE Trans. Computers 46 (6) (1997)
Yasuhiko Takenaga, Mitsushi Nouzoe, Shuzo Yajima
Size and Variable Ordering of OBDDs Representing Treshold Functions. COCOON (1997)
Masayuki Ito, Naofumi Takagi, Shuzo Yajima
Square Rooting by Iterative Multiply-Additions. Inf. Process. Lett. 60 (5) (1996)
Kiyoharu Hamaguchi, Akihito Morita, Shuzo Yajima
Efficient construction of binary moment diagrams for verifying arithmetic circuits. ICCAD (1995)
Masayuki Ito, Naofumi Takagi, Shuzo Yajima
Efficient Initial Approximation and Fast Converging Methods for Division and Square Root. IEEE Symposium on Computer Arithmetic (1995)
Takafumi Hamano, Naofumi Takagi, Shuzo Yajima, Franco P. Preparata
O(n)-depth circuit algorithm for modular exponentiation. IEEE Symposium on Computer Arithmetic (1995)
Kazuhisa Hosaka, Yasuhiko Takenaga, Shuzo Yajima
On the Size of Ordered Binary Decision Diagrams Representing Threshold Functions. ISAAC (1994)
Shoichi Hirose, Shuzo Yajima
Circuit complexity of slice functions and homogeneous functions. Systems and Computers in Japan 25 (6) (1994)
Noriyuki Takahashi, Nagisa Ishiura, Shuzo Yajima
Fault simulation for multiple faults by Boolean function manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (4) (1994)
Hiroyuki Ochi, Koichi Yasuoka, Shuzo Yajima
Breadth-first manipulation of very large binary-decision diagrams. ICCAD (1993)
Seiichiro Tani, Kiyoharu Hamaguchi, Shuzo Yajima
The Complexity of the Optimal Variable Ordering Problems of Shared Binary Decision Diagrams. ISAAC (1993)
Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima
Design Verification of a Microprocessor Using Branching Time Regular Temporal Logic. CAV (1992)
Naofumi Takagi, Shuzo Yajima
Modular Multiplication Hardware Algorithms with a Redundant Representation and Their Application to RSA Cryptosystem. IEEE Trans. Computers 41 (7) (1992)
Nagisa Ishiura, Shuzo Yajima
Linear time fault simulation algorithm using a content addressable memory. EURO-DAC (1992)
Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima
Infinity-Regular Temporal Logic and its Model Checking Problem. Theor. Comput. Sci. 103 (2) (1992)
Naofumi Takagi, Shuzo Yajima
An on-line error-detectable high-speed array divider. Systems and Computers in Japan 22 (1) (1991)
Nagisa Ishiura, Hiroshi Sawada, Shuzo Yajima
Minimazation of Binary Decision Diagrams Based on Exchanges of Variables. ICCAD (1991)
Yutaka Deguchi, Nagisa Ishiura, Shuzo Yajima
Probabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits. DAC (1991)
Noriyuki Takahashi, Nagisa Ishiura, Shuzo Yajima
Fault Simulation for Multiple Faults Using Shared BDD Representation of Fault Sets. ICCAD (1991)
Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima
Formal Verification of Speed-Dependent Asynchronous Cicuits Using Symbolic Model Checking of branching Time Regular Temporal Logic. CAV (1991)
Naofumi Takagi, Tohru Asada, Shuzo Yajima
Redundant CORDIC Methods with a Constant Scale Factor for Sine and Cosine Computation. IEEE Trans. Computers 40 (9) (1991)
Hiromi Hiraishi, Kiyoharu Hamaguchi, Hiroyuki Ochi, Shuzo Yajima
Vectorized Symbolic Model Checking of Computation Tree Logic for Sequential Machine Verification. CAV (1991)
Hiroyuki Ochi, Nagisa Ishiura, Shuzo Yajima
Breadth-First Manipulation of SBDD of Boolean Functions for Vector Processing. DAC (1991)
Shin-ichi Minato, Nagisa Ishiura, Shuzo Yajima
Shared Binary Decision Diagram with Attributed Edges for Efficient Boolean function Manipulation. DAC (1990)
Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima
Branching Time Regular Temporal Logic for Model Checking with Linear Time Complexity. CAV (DIMACS/AMS volume) (1990)
Nagisa Ishiura, Hiroto Yasuura, Shuzo Yajima
NES: The Behavioral Model for the Formal Semantics of a Hardware Design Language UDL/I. DAC (1990)
Nagisa Ishiura, Masayuki Ito, Shuzo Yajima
Dynamic two-dimensional parallel simulation technique for high-speed fault simulation on a vector processor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (8) (1990)
Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima
Branching Time Regular Temporal Logic for Model Checking with Linear Time Complexity. CAV (1990)
Nagisa Ishiura, Yutaka Deguchi, Shuzo Yajima
Coded Time-Symbolic Simulation Using Shared Binary Decision Diagram. DAC (1990)
Nagisa Ishiura, Mizuki Takahashi, Shuzo Yajima
Time-Symbolic Simulation for Accurate Timing Verification of Asynchronous Behavior of Logic Circuits. DAC (1989)
Naofumi Takagi, Shuzo Yajima
An on-line error-detectable array divider with a redundant binary representation and a residue code. FTCS (1988)
Yasuo Okabe, Shuzo Yajima
Parallel Computational Complexity of Logic Programs and Alternating Turing Machines. FGCS (1988)
Shigeharu Teshima, Hiromi Hiraishi, Shuzo Yajima
Algebraic Specification of Parallel Systems Based on Binary Relations between Events. Systems and Computers in Japan 19 (10) (1988)
Naofumi Takagi, Shuzo Yajima
On-Line Error-Detectable High-Speed Multiplier Using Redundant Binary Representation and Three-Rail Logic. IEEE Trans. Computers 36 (11) (1987)
Shinji Kimura, Shuzo Yajima
Description and verification of input constraints and input-output specifications of logic circuits. Systems and Computers in Japan 18 (2) (1987)
Hiroto Yasuura, Naofumi Takagi, Shuzo Yajima
On high-speed parallel algorithms using redundant coding. Systems and Computers in Japan 18 (12) (1987)
Nagisa Ishiura, Hiroto Yasuura, Shuzo Yajima
High-Speed Logic Simulation on Vector Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (3) (1987)
Naofumi Takagi, Tohru Asada, Shuzo Yajima
A hardware algorithm for computing sine and cosine using redundant binary representation. Systems and Computers in Japan 18 (8) (1987)
Naofumi Takagi, Shuzo Yajima
A square root hardware algorithm using redundant binary representation. Systems and Computers in Japan 17 (11) (1986)
Naofumi Takagi, Shuzo Yajima
Hardware algorithms for computing exponentials and logarithms using redundant binary representation. Systems and Computers in Japan 17 (12) (1986)
Naofumi Takagi, Hiroto Yasuura, Shuzo Yajima
High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree. IEEE Trans. Computers 34 (9) (1985)
Hiroto Yasuura, Shuzo Yajima
Hardware Algorithms for VLSI Systems. VLSI Engineering (1984)
Yahiko Kambayashi, Masatoshi Yoshikawa, Shuzo Yajima
Query Processing for Distributed Databases Using Generalized Semi-Joins. SIGMOD Conference (1982)
Narao Nakatsu, Yahiko Kambayashi, Shuzo Yajima
A Longest Common Subsequence Algorithm Suitable for Similar Text Strings. Acta Informatica 18 (1982)
Takeshi Sakai, Yoshiyuki Tsuchida, Hiroto Yasuura, Yasushi Ooi, Yoshitsugu Ono, Hiroshi Kano, Shinji Kimura, Shuzo Yajima
An Interactive Simulation System for structured logic design - ISS. DAC (1982)
Hiroto Yasuura, Naofumi Takagi, Shuzo Yajima
The Parallel Enumeration Sorting Scheme for VLSI. IEEE Trans. Computers 31 (12) (1982)
Shuzo Yajima, Hiroto Yasuura
Hardware Algorithms and Logic Design Automation. An Overview and Progress Report. RIMS Symposium on Software Science and Engineering (1982)
Shuzo Yajima, Jan L. Goodsell, Takao Ichida, Hiromi Hiraishi
Data Compression of the Kanji Character Patterns Digitized on the Hexagonal Mesh. IEEE Trans. Pattern Anal. Mach. Intell. 3 (2) (1981)
Yahiko Kambayashi, Narao Nakatsu, Shuzo Yajima
Data compression procedures utilizing the similarity of data. AFIPS National Computer Conference (1981)
Yahiko Kambayashi, Takaki Hayashi, Shuzo Yajima
Dynamic Clustering Procedures for Bibliographic Data. SIGIR (1981)
Yahiko Kambayashi, Narao Nakatsu, Shuzo Yajima
Hierarchical string pattern matching using dynamic pattern matching machines. COMPSAC (1979)
Yahiko Kambayashi, Shuzo Yajima, Osamu Konishi, Takaki Hayashi
New indices for bibliographic data and their applications. MARK (1979)
Chung Le Viet, Yahiko Kambayashi, Katsumi Tanaka, Shuzo Yajima
Use of abstracted characteristics of data in relational databases. COMPSAC (1979)
Katsumi Tanaka, Yahiko Kambayashi, Shuzo Yajima
Organization of quasi-consecutive retrieval files. Inf. Syst. 4 (3) (1979)
Yahiko Kambayashi, Katsumi Tanaka, Shuzo Yajima
Semantic aspects of data dependencies and their application to relational database design. COMPSAC (1979)
Katsumi Tanaka, Chung Le Viet, Yahiko Kambayashi, Shuzo Yajima
A file organization suitable for relational database operations. Mathematical Studies of Information Processing (1978)
Yahiko Kambayashi, Katsumi Tanaka, Shuzo Yajima
Problems of Relational Database Design. Data Base Design Techniques I (1978)
Yahiko Kambayashi, Takaki Hayashi, Y. Tanaka, Shuzo Yajima
A Linear Storage Space Algorithm for a Reference Structure Index. Inf. Process. Lett. 7 (2) (1978)
Shuzo Yajima, Yahiko Kambayashi, Susumu Yoshida, Kazuo Iwama
Labolink: An Optically Linked Laboratory Computer Network. Computer 10 (11) (1977)
Yahiko Kambayashi, Katsumi Tanaka, Shuzo Yajima
A Relational Data Language with Simplified Binary Relation Handling Capability. VLDB (1977)
Shuzo Yajima, Kosaku Inagaki
Power Minimization Problems of Logic Networks. IEEE Trans. Computers 23 (2) (1974)
Yahiko Kambayashi, Shuzo Yajima
Finite Memory Machines Satisfying the Lower Bound of Memory Inf. Control. 20 (2) (1972)
Yahiko Kambayashi, Shuzo Yajima
Controllability of Seqential Machines Inf. Control. 21 (4) (1972)
Yahiko Kambayashi, Shuzo Yajima
The Upper Bound of K in K-Lossless Sequential Machines Inf. Control. 19 (5) (1971)
Toshio Yasui, Shuzo Yajima
Two-State Two-Symbol Probabilistic Automata Inf. Control. 16 (3) (1970)
Yahiko Kambayashi, Shuzo Yajima, Isao Ohbayashi
On Finite-Memory Sequential Machines. IEEE Trans. Computers 19 (3) (1970)
Toshio Yasui, Shuzo Yajima
Some Algebraic Properties of Sets of Stochastic Matrices Inf. Control. 14 (4) (1969)
Shuzo Yajima, Toshihide Ibaraki
Realization of Arbitrary Logic Functions by Completely Monotonic Functions and Its Applications to Threshold Logic. IEEE Trans. Computers 17 (4) (1968)
Shuzo Yajima, Toshihide Ibaraki
A Theory of Completely Monotonic Functions and its Applications to Threshold Logic. IEEE Trans. Computers 17 (3) (1968)
Shuzo Yajima, Toshihide Ibaraki, I. Kawano
On Autonomous Logic Nets of Threshold Elements. IEEE Trans. Computers 17 (4) (1968)
Shuzo Yajima, Toshihide Ibaraki
A Lower Bound of the Number of Threshold Functions. IEEE Trans. Electron. Comput. 14 (6) (1965)