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On-Line Error-Detectable High-Speed Multiplier Using Redundant Binary Representation and Three-Rail Logic.
Naofumi Takagi
Shuzo Yajima
Published in:
IEEE Trans. Computers (1987)
Keyphrases
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high speed
binary representation
crossover and mutation operators
low power
non binary
modal logic
hamming distance
real time
upper bound
hardware implementation
knn
multi dimensional
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