Shuanglong Liu

ORCID

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 32

Top Venues

FPT

CoRR

IEEE Trans. Neural Networks Learn. Syst.

FPGA

Imperial College London, UK (PHD)

Education History

Imperial College London, UK

PHD

Publications

Shuanglong Liu, Hongxiang Fan, Wayne Luk
Design of Fully Spectral CNNs for Efficient FPGA-Based Acceleration. IEEE Trans. Neural Networks Learn. Syst. 35 (6) (2024)
Hao Mark Chen, Liam Castelli, Martin Ferianc, Hongyu Zhou, Shuanglong Liu, Wayne Luk, Hongxiang Fan
Enhancing Dropout-based Bayesian Neural Networks with Multi-Exit on FPGA. CoRR (2024)
Hongxiang Fan, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk
High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point. IEEE Trans. Neural Networks Learn. Syst. 34 (8) (2023)
Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk
Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator. ASP-DAC (2022)
Hongxiang Fan, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Miguel R. D. Rodrigues, Wayne Luk
FPGA-Based Acceleration for Bayesian Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Shuanglong Liu, Hongxiang Fan, Martin Ferianc, Xinyu Niu, Huifeng Shi, Wayne Luk
Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs. IEEE Trans. Neural Networks Learn. Syst. 33 (8) (2022)
Shuanglong Liu, Hongxiang Fan, Wayne Luk
Accelerating Fully Spectral CNNs with Adaptive Activation Functions on FPGA. DATE (2021)
Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk
Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator. CoRR (2021)
Ho-Cheung Ng, Izaak Coleman, Shuanglong Liu, Wayne Luk
Reconfigurable Acceleration of Short Read Mapping with Biological Consideration. FPGA (2021)
Ho-Cheung Ng, Shuanglong Liu, Izaak Coleman, Ringo S. W. Chu, Man-Chung Yue, Wayne Luk
Acceleration of Short Read Alignment with Runtime Reconfiguration. FPT (2020)
Hongxiang Fan, Martin Ferianc, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk
Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search. ICCD (2020)
Shuanglong Liu, Wayne Luk
Optimizing Fully Spectral Convolutional Neural Networks on FPGA. FPT (2020)
Zhiqiang Que, Thomas Nugent, Shuanglong Liu, Li Tian, Xinyu Niu, Yongxin Zhu, Wayne Luk
Efficient Weight Reuse for Large LSTMs. ASAP (2019)
Cheng Luo, Man-Kit Sit, Hongxiang Fan, Shuanglong Liu, Wayne Luk, Ce Guo
Towards Efficient Deep Neural Network Training by FPGA-Based Batch-Level Parallelism. FCCM (2019)
Hongxiang Fan, Cheng Luo, Chenglong Zeng, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Wayne Luk
F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition. ASAP (2019)
Shuanglong Liu, Ringo S. W. Chu, Xiwei Wang, Wayne Luk
Optimizing CNN-Based Hyperspectral Image Classification on FPGAs. ARC (2019)
Shuanglong Liu, Ringo S. W. Chu, Xiwei Wang, Wayne Luk
Optimizing CNN-based Hyperspectral ImageClassification on FPGAs. CoRR (2019)
Shuanglong Liu, Wayne Luk
Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs. FPL (2019)
Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk
Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. FPL (2018)
Hongxiang Fan, Shuanglong Liu, Martin Ferianc, Ho-Cheung Ng, Zhiqiang Que, Shen Liu, Xinyu Niu, Wayne Luk
A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA. FPT (2018)
Ho-Cheung Ng, Shuanglong Liu, Wayne Luk
ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development. FPGA (2018)
Shuanglong Liu, Chenglong Zeng, Hongxiang Fan, Ho-Cheung Ng, Jiuxi Meng, Zhiqiang Que, Xinyu Niu, Wayne Luk
Memory-Efficient Architecture for Accelerating Generative Networks on FPGA. FPT (2018)
Ruizhe Zhao, Shuanglong Liu, Ho-Cheung Ng, Erwei Wang, James J. Davis, Xinyu Niu, Xiwei Wang, Huifeng Shi, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk
Hardware Compilation of Deep Neural Networks: An Overview. ASAP (2018)
Shuanglong Liu, Hongxiang Fan, Xinyu Niu, Ho-Cheung Ng, Yang Chu, Wayne Luk
Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA. ACM Trans. Reconfigurable Technol. Syst. 11 (3) (2018)
Shuanglong Liu, Xinyu Niu, Wayne Luk
A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only. FPGA (2018)
Shuanglong Liu, Christos-Savvas Bouganis
Communication-Aware MCMC Method for Big Data Applications on FPGAs. FCCM (2017)
Ho-Cheung Ng, Shuanglong Liu, Wayne Luk
Reconfigurable acceleration of genetic sequence alignment: A survey of two decades of efforts. FPL (2017)
Shuanglong Liu, Grigorios Mingas, Christos-Savvas Bouganis
An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic. IEEE Trans. Computers 66 (5) (2017)
Shuanglong Liu, Chao Zhang, Jinwen Ma
CNN-LSTM Neural Network Model for Quantitative Strategy Analysis in Stock Markets. ICONIP (2) (2017)
Shuanglong Liu, Chao Zhang, Jinwen Ma
Stacked Auto-Encoders for Feature Extraction with Neural Networks. BIC-TA (1) (2016)
Shuanglong Liu, Jinwen Ma
Stock Price Prediction Through the Mixture of Gaussian Processes via the Precise Hard-cut EM Algorithm. ICIC (3) (2016)
Shuanglong Liu, Grigorios Mingas, Christos-Savvas Bouganis
An exact MCMC accelerator under custom precision regimes. FPT (2015)
Shuanglong Liu, Grigorios Mingas, Christos-Savvas Bouganis
Parallel resampling for particle filters on FPGAs. FPT (2014)
Shuanglong Liu, Yuchao Tang, Chun Zhang, Shigang Yue
Self-map building in wireless sensor network based on TDOA measurements. MFI (2012)

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Publication Activity (10 Years)

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Shuanglong Liu