James J. Davis

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 30

Top Topics

Nonmonotonic Inference

Heterogeneous Systems

Iterative Methods

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Publications

Erwei Wang, Marie Auffret, Georgios-Ilias Stavrou, Peter Y. K. Cheung, George A. Constantinides, Mohamed S. Abdelfattah, James J. Davis
Logic Shrinkage: Learned Connectivity Sparsification for LUT-Based Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 16 (4) (2023)
Erwei Wang, James J. Davis, Daniele Moro, Piotr Zielinski, Jia Jie Lim, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides
Enabling Binary Neural Network Training on the Edge. ACM Trans. Embed. Comput. Syst. 22 (6) (2023)
Erwei Wang, James J. Davis, Georgios-Ilias Stavrou, Peter Y. K. Cheung, George A. Constantinides, Mohamed Abdelfattah
Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference. FPGA (2022)
Marie Auffret, Erwei Wang, James J. Davis
FPL Demo: Logic Shrinkage: A Neural Architecture Search-Based Approach to FPGA Netlist Generation. FPL (2022)
Erwei Wang, James J. Davis, Daniele Moro, Piotr Zielinski, Jia Jie Lim, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides
Enabling Binary Neural Network Training on the Edge. EMDL@MobiSys (2021)
Erwei Wang, James J. Davis, Daniele Moro, Piotr Zielinski, Claudionor Coelho, Satrajit Chatterjee, Peter Y. K. Cheung, George A. Constantinides
Enabling Binary Neural Network Training on the Edge. CoRR (2021)
Erwei Wang, James J. Davis, Georgios-Ilias Stavrou, Peter Y. K. Cheung, George A. Constantinides, Mohamed Abdelfattah
Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference. CoRR (2021)
He Li, Ian McInerney, James J. Davis, George A. Constantinides
Digit Stability Inference for Iterative Methods Using Redundant Number Representation. IEEE Trans. Computers 70 (7) (2021)
He Li, Ian McInerney, James J. Davis, George A. Constantinides
Digit Stability Inference for Iterative Methods Using Redundant Number Representation. CoRR (2020)
He Li, James J. Davis, John Wickerson, George A. Constantinides
architect: Arbitrary-Precision Hardware With Digit Elision for Efficient Iterative Compute. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
Erwei Wang, James J. Davis, Peter Y. K. Cheung, George A. Constantinides
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference. IEEE Trans. Computers 69 (12) (2020)
Erwei Wang, James J. Davis, Peter Y. K. Cheung, George A. Constantinides
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference. CoRR (2019)
Erwei Wang, James J. Davis, Peter Y. K. Cheung, George A. Constantinides
LUTNet: Rethinking Inference in FPGA Soft Logic. FCCM (2019)
He Li, James J. Davis, John Wickerson, George A. Constantinides
ARCHITECT: Arbitrary-precision Hardware with Digit Elision for Efficient Iterative Compute. CoRR (2019)
Erwei Wang, James J. Davis, Peter Y. K. Cheung, George A. Constantinides
LUTNet: Rethinking Inference in FPGA Soft Logic. CoRR (2019)
Erwei Wang, James J. Davis, Ruizhe Zhao, Ho-Cheung Ng, Xinyu Niu, Wayne Luk, Peter Y. K. Cheung, George A. Constantinides
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going. CoRR (2019)
Erwei Wang, James J. Davis, Ruizhe Zhao, Ho-Cheung Ng, Xinyu Niu, Wayne Luk, Peter Y. K. Cheung, George A. Constantinides
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going. ACM Comput. Surv. 52 (2) (2019)
Graeme M. Bragg, Charles Leech, Domenico Balsamo, James J. Davis, Eduardo Wächter, Geoff V. Merrett, George A. Constantinides, Bashir M. Al-Hashimi
An Application- and Platform-agnostic Runtime Management Framework for Multicore Systems. PECCS (2018)
He Li, James J. Davis, John Wickerson, George A. Constantinides
Digit Elision for Arbitrary-accuracy Iterative Computation. ARITH (2018)
James J. Davis, Eddie Hung, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides
KAPow: High-Accuracy, Low-Overhead Online Per-Module Power Estimation for FPGA Designs. ACM Trans. Reconfigurable Technol. Syst. 11 (1) (2018)
Erwei Wang, James J. Davis, Peter Y. K. Cheung
A PYNQ-Based Framework for Rapid CNN Prototyping. FCCM (2018)
Ruizhe Zhao, Shuanglong Liu, Ho-Cheung Ng, Erwei Wang, James J. Davis, Xinyu Niu, Xiwei Wang, Huifeng Shi, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk
Hardware Compilation of Deep Neural Networks: An Overview. ASAP (2018)
James J. Davis, Joshua M. Levine, Edward A. Stott, Eddie Hung, Peter Y. K. Cheung, George A. Constantinides
KOCL: Kernel-level Power Estimation for Arbitrary FPGA-SoC-accelerated OpenCL Applications. IWOCL (2018)
He Li, James J. Davis, John Wickerson, George A. Constantinides
architect: Arbitrary-precision constant-hardware iterative compute. FPT (2017)
Fei Xia, Ashur Rafiev, Ali Aalsaud, Mohammed A. Noaman Al-Hayanni, James J. Davis, Joshua M. Levine, Andrey Mokhov, Alexander B. Romanovsky, Rishad A. Shafik, Alex Yakovlev, Sheng Yang
Voltage, Throughput, Power, Reliability, and Multicore Scaling. Computer 50 (8) (2017)
James J. Davis, Joshua M. Levine, Edward A. Stott, Eddie Hung, Peter Y. K. Cheung, George A. Constantinides
STRIPE: Signal selection for runtime power estimation. FPL (2017)
James J. Davis, Joshua M. Levine, Edward A. Stott, Eddie Hung, Peter Y. K. Cheung, George A. Constantinides
KOCL: Power Self- Awareness for Arbitrary FPGA-SoC-Accelerated OpenCL Applications. IEEE Des. Test 34 (6) (2017)
James J. Davis, Eddie Hung, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides
Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only). FPGA (2016)
James J. Davis, Peter Y. K. Cheung
Reduced-precision Algorithm-based Fault Tolerance for FPGA-implemented Accelerators. ARC (2016)
Eddie Hung, James J. Davis, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides
KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs. FCCM (2016)
Sheng Yang, Rishad A. Shafik, Geoff V. Merrett, Edward A. Stott, Joshua M. Levine, James J. Davis, Bashir M. Al-Hashimi
Adaptive energy minimization of embedded heterogeneous systems using regression-based learning. PATMOS (2015)
James J. Davis, Peter Y. K. Cheung
Achieving low-overhead fault tolerance for parallel accelerators with dynamic partial reconfiguration. FPL (2014)
James J. Davis, Peter Y. K. Cheung
Reducing Overheads for Fault-Tolerant Datapaths with Dynamic Partial Reconfiguration. FCCM (2014)
James J. Davis, Peter Y. K. Cheung
Datapath fault tolerance for parallel accelerators. FPT (2013)