Memory-Efficient Architecture for Accelerating Generative Networks on FPGA.
Shuanglong LiuChenglong ZengHongxiang FanHo-Cheung NgJiuxi MengZhiqiang QueXinyu NiuWayne LukPublished in: FPT (2018)
Keyphrases
- memory efficient
- hardware architecture
- hardware implementation
- software implementation
- real time
- external memory
- hardware architectures
- fpga implementation
- hardware design
- xilinx virtex
- dedicated hardware
- network architecture
- parallel architecture
- software architecture
- multithreading
- field programmable gate array
- data flow
- network structure
- iterative deepening
- management system
- complex networks
- real time image processing
- high speed
- pipelined architecture
- multiple sequence alignment
- systolic array
- reconfigurable hardware
- hardware software
- generative model
- image processing