A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA.
Hongxiang FanShuanglong LiuMartin FeriancHo-Cheung NgZhiqiang QueShen LiuXinyu NiuWayne LukPublished in: FPT (2018)
Keyphrases
- field programmable gate array
- hardware implementation
- embedded systems
- parallel computing
- programmable logic
- hardware architecture
- image processing algorithms
- fpga implementation
- data structure
- parallel implementation
- compressed domain
- hardware design
- high speed
- software implementation
- real time
- computing systems
- data compression
- fpga technology
- suffix array
- raster images
- digital signal
- hardware description language
- verilog hdl
- parallel hardware
- fpga device
- reconfigurable hardware
- dedicated hardware
- hardware software
- low cost
- image processing