Sadayuki Morita

Publication Activity (10 Years)

Years Active: 1994-2013
Publications (10 Years): 0

Top Topics

Monitoring System

Top Venues

Publications

Takao Nomura, Ryo Mori, Munehiro Ito, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Kazuo Otsuga, Koji Nii, Sadayuki Morita, Tomoaki Hashimoto, Tsuyoshi Kida, Junichi Yamada, Hideki Tanaka
Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor. CICC (2013)
Kazuki Fukuoka, Ryo Mori, A. Kato, Motoshige Igarashi, Koji Shibutani, T. Yamaki, Shinji Tanaka, Koji Nii, Sadayuki Morita, Takao Koike, Noriaki Sakamoto
A 123μW standby power technique with EM-tolerant 1.8V I/O NMOS power switch in 28nm HKMG technology. CICC (2012)
Kazuo Otsuga, Masafumi Onouchi, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa
An on-chip 250 mA 40 nm CMOS digital LDO using dynamic sampling clock frequency scaling with offset-free TDC-based voltage sensor. SoCC (2012)
Masafumi Onouchi, Kazuo Otsuga, Yasuto Igarashi, Toyohito Ikeya, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa
A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS process. A-SSCC (2011)
Akira Kotabe, Kenichi Osada, Naoki Kitai, Mio Fujioka, Shiro Kamohara, Masahiro Moniwa, Sadayuki Morita, Yoshikazu Saitoh
A low-power four-transistor SRAM cell with a stacked vertical poly-silicon PMOS and a dual-word-voltage scheme. IEEE J. Solid State Circuits 40 (4) (2005)
Koichiro Ishibashi, Kunihiro Komiyaji, Sadayuki Morita, Toshiro Aoto, Shuji Ikeda, Kyoichiro Asayama, Atsuyosi Koike, Toshiaki Yamanaka, Naotaka Hashimoto, Haruhito Iida, Fumio Kojima, Koichi Motohashi, Katsuro Sasaki
A 12.5-ns 16-Mb CMOS SRAM with common-centroid-geometry-layout sense amplifiers. IEEE J. Solid State Circuits 29 (4) (1994)