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Ryo Mori
Publication Activity (10 Years)
Years Active: 2007-2016
Publications (10 Years): 2
Top Topics
High Density
Level Parallelism
Embedded Dram
Vlsi Architecture
Top Venues
CICC
3DIC
IEEE J. Emerg. Sel. Topics Circuits Syst.
ISSCC
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Publications
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Takao Nomura
,
Ryo Mori
,
Koji Takayanagi
,
Kazuki Fukuoka
,
Koji Nii
Design Challenges in 3-D SoC Stacked With a 12.8 GB/s TSV Wide I/O DRAM.
IEEE J. Emerg. Sel. Topics Circuits Syst.
6 (3) (2016)
Mitsuhiko Igarashi
,
Toshifumi Uemura
,
Ryo Mori
,
Hiroshi Kishibe
,
Midori Nagayama
,
Masaaki Taniguchi
,
Kohei Wakahara
,
Toshiharu Saito
,
Masaki Fujigaya
,
Kazuki Fukuoka
,
Koji Nii
,
Takeshi Kataoka
,
Toshihiro Hattori
A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor With 2 GHz Cores and Low-Power 1 GHz Cores.
IEEE J. Solid State Circuits
50 (1) (2015)
Mitsuhiko Igarashi
,
Toshifumi Uemura
,
Ryo Mori
,
Noriaki Maeda
,
Hiroshi Kishibe
,
Midori Nagayama
,
Masaaki Taniguchi
,
Kohei Wakahara
,
Toshiharu Saito
,
Masaki Fujigaya
,
Kazuki Fukuoka
,
Koji Nii
,
Takeshi Kataoka
,
Toshihiro Hattori
10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores.
ISSCC
(2014)
Kentaro Mori
,
Yoshihiro Ono
,
Shinji Watanabe
,
Toshikazu Ishikawa
,
Michiaki Sugiyama
,
Satoshi Imasu
,
Toshihiko Ochiai
,
Ryo Mori
,
Tsuyoshi Kida
,
Tomoaki Hashimoto
,
Hideki Tanaka
,
Michitaka Kimura
High density and reliable packaging technology with Non Conductive Film for 3D/TSV.
3DIC
(2013)
Takao Nomura
,
Ryo Mori
,
Munehiro Ito
,
Koji Takayanagi
,
Toshihiko Ochiai
,
Kazuki Fukuoka
,
Kazuo Otsuga
,
Koji Nii
,
Sadayuki Morita
,
Tomoaki Hashimoto
,
Tsuyoshi Kida
,
Junichi Yamada
,
Hideki Tanaka
Testability improvement for 12.8 GB/s Wide IO DRAM controller by small area pre-bonding TSV tests and a 1 GHz sampled fully digital noise monitor.
CICC
(2013)
Kazuki Fukuoka
,
Ryo Mori
,
A. Kato
,
Motoshige Igarashi
,
Koji Shibutani
,
T. Yamaki
,
Shinji Tanaka
,
Koji Nii
,
Sadayuki Morita
,
Takao Koike
,
Noriaki Sakamoto
A 123μW standby power technique with EM-tolerant 1.8V I/O NMOS power switch in 28nm HKMG technology.
CICC
(2012)
Yusuke Kanno
,
Yuki Kondoh
,
Takahiro Irita
,
Kenji Hirose
,
Ryo Mori
,
Yoshihiko Yasu
,
Shigenobu Komatsu
,
Hiroyuki Mizuno
In-Situ Measurement of Supply-Noise Maps With Millivolt Accuracy and Nanosecond-Order Time Resolution.
IEEE J. Solid State Circuits
42 (4) (2007)