10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores.
Mitsuhiko IgarashiToshifumi UemuraRyo MoriNoriaki MaedaHiroshi KishibeMidori NagayamaMasaaki TaniguchiKohei WakaharaToshiharu SaitoMasaki FujigayaKazuki FukuokaKoji NiiTakeshi KataokaToshihiro HattoriPublished in: ISSCC (2014)
Keyphrases
- low power
- high speed
- mobile applications
- power consumption
- cmos technology
- single chip
- clock frequency
- intel xeon
- multi core processors
- low cost
- high power
- processor core
- nm technology
- embedded dram
- gate array
- vlsi architecture
- level parallelism
- vlsi circuits
- mobile phone
- power reduction
- dynamic random access memory
- wireless transmission
- logic circuits
- mixed signal
- low power consumption
- context aware
- real time
- power dissipation
- mobile environments
- mobile devices
- user experience
- user interface