Sabyasachi Deyati

ORCID

Publication Activity (10 Years)

Years Active: 2011-2023
Publications (10 Years): 12

Top Venues

Georgia Institute of Technology, Atlanta, GA, USA (PHD)

Education History

Georgia Institute of Technology, Atlanta, GA, USA

PHD

Publications

Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
BISCC: A Novel Approach to Built In State Consistency Checking For Quick Volume Validation of Mixed-Signal/RF Systems. J. Electron. Test. 39 (3) (2023)
Sabyasachi Deyati, Barry J. Muldrey, Adit D. Singh, Abhijit Chatterjee
High Resolution Pulse Propagation Driven Trojan Detection in Digital Systems. J. Electron. Test. 37 (1) (2021)
Sabyasachi Deyati, Barry J. Muldrey, Abhijit Chatterjee
Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Sabyasachi Deyati, Barry J. Muldrey, Byunghoo Jung, Abhijit Chatterjee
Concurrent built in test and tuning of beamforming MIMO systems using learning assisted performance optimization. ITC (2017)
Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities via Iterative Learning Experiments on Hardware. VLSI Design (2017)
Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
BISCC: Efficient pre through post silicon validation of mixed-signal/RF systems using built in state consistency checking. DATE (2017)
Sujay Pandey, Sabyasachi Deyati, Adit D. Singh, Abhijit Chatterjee
Noise-Resilient SRAM Physically Unclonable Function Design for Security. ATS (2016)
Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems. ITC (2016)
Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
Trojan detection in digital systems using current sensing of pulse propagation in logic gates. ISQED (2016)
Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits. ATS (2016)
Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm. VLSI Design (2016)
Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee
Adaptive testing of analog/RF circuits using hardware extracted FSM models. VTS (2016)
Sabyasachi Deyati, Barry John Muldrey, Adit D. Singh, Abhijit Chatterjee
Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security. ATS (2015)
Bruce Querbach, Rahul Khanna, David Blankenbeckler, Yulan Zhang, Ronald T. Anderson, David G. Ellis, Zale T. Schoenborn, Sabyasachi Deyati, Patrick Chiang
A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time. ITC (2014)
Sabyasachi Deyati, Barry John Muldrey, Adit D. Singh, Abhijit Chatterjee
High Resolution Pulse Propagation Driven Trojan Detection in Digital Logic: Optimization Algorithms and Infrastructure. ATS (2014)
Sabyasachi Deyati, Barry John Muldrey, Aritra Banerjee, Abhijit Chatterjee
Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits. VTS (2014)
Debesh Bhatta, Aritra Banerjee, Sabyasachi Deyati, Nicholas Tzou, Abhijit Chatterjee
Low Cost Signal Reconstruction Based Testing of RF Components using Incoherent Undersampling. J. Electron. Test. 30 (2) (2014)
Barry John Muldrey, Sabyasachi Deyati, Michael Giardino, Abhijit Chatterjee
RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning. VTS (2013)
Debesh Bhatta, Aritra Banerjee, Sabyasachi Deyati, Nicholas Tzou, Abhijit Chatterjee
Low cost signal reconstruction based testing of RF components using incoherent undersampling. LATW (2013)
Sabyasachi Deyati, Aritra Banerjee, Barry John Muldrey, Abhijit Chatterjee
VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests. VLSI Design (2013)
Sabyasachi Deyati, Aritra Banerjee, Abhijit Chatterjee
Pilot symbol driven monitoring of electrical degradation in RF transmitter systems using model anomaly diagnosis. IOLTS (2012)
Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, Shyam Kumar Devarakond, Aritra Banerjee
Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits. ICCAD (2012)
Sabyasachi Deyati, Pradip Mandal
An automated design methodology for yield aware analog circuit synthesis in submicron technology. ISQED (2011)

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Publication Activity (10 Years)

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Sabyasachi Deyati