Pradip Mandal

Publication Activity (10 Years)

Years Active: 1993-2024
Publications (10 Years): 17

Top Topics

Signal Acquisition

Autocorrelation Function

Delta Sigma Modulators

Top Venues

IET Circuits Devices Syst.

Publications

Tamal Chowdhury, Pradip Mandal
A Neuro Inspired Pulse Density Modulator Sensing Unipolar and Bipolar Current Signals. VLSID (2024)
Jahnvi Singh, Nijwm Wary, Pradip Mandal
Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. VLSID (2024)
Subrahmanyam Perumalla, Pradip Mandal
Ultra-low Power Current Comparator. ISCAS (2023)
Nijwm Wary, Antroy Roy Chowdhury, Pradip Mandal
Hybrid bidirectional transceiver for multipoint-to-multipoint signalling across on-chip global interconnects. IET Circuits Devices Syst. 14 (6) (2020)
Joydeep Basu, Pradip Mandal
Delta-sigma modulator based compact sensor signal acquisition front-end system. Microelectron. J. 98 (2020)
Joydeep Basu, Pradip Mandal
Switched-Capacitor Common-Mode Feedback-Based Fully Differential Operational Amplifiers and its Usage in Implementation of Integrators. J. Circuits Syst. Comput. 29 (14) (2020)
Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal
Energy Efficient Bidirectional Equalized Transceiver with PVT Insensitive Active Termination. VLSI Design (2019)
Sabir Ali Mondal, Pradip Mandal, Hafizur Rahaman
Fast locking, startup-circuit free, low area, 32-phase analog DLL. Integr. 66 (2019)
Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal
A Regulated-Cascode Based Current-Integrating TIA RX with 1-tap Speculative Adaptive DFE. MWSCAS (2019)
Shyamal Kumar Hui, Siraj Uddin, Pradip Mandal
Submanifolds of generalized \((k, \mu )\) -space-forms. Period. Math. Hung. 77 (2) (2018)
Joydeep Basu, Pradip Mandal
Effect of Switched-Capacitor CMFB on the Gain of Fully Differential Op-Amp for Design of Integrators. ISCAS (2018)
Nijwm Wary, Pradip Mandal
Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects. IEEE J. Solid State Circuits 52 (8) (2017)
Nijwm Wary, Pradip Mandal
Current-Mode Triline Transceiver for Coded Differential Signaling Across On-Chip Global Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 25 (9) (2017)
Samiran Dam, Pradip Mandal
A Stacked VCO Architecture for Generating Multi-level Synchronous Control Signals. VLSI Design (2016)
Nijwm Wary, Pradip Mandal
High-speed energy-efficient bi-directional transceiver for on-chip global interconnects. IET Circuits Devices Syst. 9 (5) (2015)
Debashis Mandal, Pradip Mandal, Tarun Kanti Bhattacharyya
Spur reduction in frequency synthesizer with an array of switched capacitors. Int. J. Circuit Theory Appl. 43 (12) (2015)
Debashis Mandal, Pradip Mandal, T. K. Bhattacharyya
Prediction of reference spur in frequency synthesisers. IET Circuits Devices Syst. 9 (2) (2015)
Kaushik Bhattacharyya, Pradip Mandal
An approach to design and implementation of on-chip clock generator for the switched capacitor based embedded DC-DC converter. Comput. Electr. Eng. 40 (4) (2014)
Debashis Mandal, Pradip Mandal, T. K. Bhattacharyya
Spur reducing architecture of frequency synthesiser using switched capacitors. IET Circuits Devices Syst. 8 (4) (2014)
Sudip Kundu, Pradip Mandal
ISGP: Iterative sequential geometric programming for precise and robust CMOS analog circuit sizing. Integr. 47 (4) (2014)
Samiran Dam, Pradip Mandal
Modeling and design of CMOS analog circuits through hierarchical abstraction. Integr. 46 (4) (2013)
Biswajit Maity, Pradip Mandal
A High Performance Switched Capacitor-Based DC-DC Buck Converter Suitable for Embedded Power Management Applications. IEEE Trans. Very Large Scale Integr. Syst. 20 (10) (2012)
Supriyo Maji, Pradip Mandal
A Fast Equation Free Iterative Approach to Analog Circuit Sizing. VLSI Design (2012)
Supriyo Maji, Pradip Mandal
Effcient approaches to overcome non-convexity issues in analog design automation. ISQED (2012)
Biswajit Maity, Pradip Mandal
Design of Push-Pull Dynamic Leaker Circuit for a Low Power Embedded Voltage Regulator. VDAT (2012)
Biswajit Maity, Soumya Gangula, Pradip Mandal
Design and Implementation of an Area and Power Efficient Switched-Capacitor Based Embedded DC-DC Converter. J. Low Power Electron. 8 (2) (2012)
Kaushik Bhattacharyya, P. V. Ratna Kumar, Pradip Mandal
Improvement of Power Efficiency and output voltage Ripple of Embedded DC-DC converters with Three Step Down ratios. J. Circuits Syst. Comput. 21 (1) (2012)
Samiran Dam, Pradip Mandal
Iterative Performance Model Upgradation in Geometric Programming Based Analog Circuit Sizing for Improved Design Accuracy. VLSI Design (2012)
P. Vijaya Sankara Rao, Pradip Mandal
Active-terminated transmitter and receiver circuits for high-speed low-swing duobinary signaling. Int. J. Circuit Theory Appl. 40 (4) (2012)
P. Vijaya Sankara Rao, Nachiket Desai, Pradip Mandal
A Low-Power 5-Gb/s Current-Mode LVDS Output Driver and Receiver with Active Termination. Circuits Syst. Signal Process. 31 (1) (2012)
Debashis Mandal, Pradip Mandal, Tarun Kanti Bhattacharyya
Spur suppression in frequency synthesizer using switched capacitor array. ISOCC (2012)
Kaushik Bhattacharyya, Pradip Mandal
Improvement of Performance of Dynamically Reconfigurable Switched Capacitor Based Non-Overlap Rotational Time Interleaved Embedded DC-DC Converter. J. Low Power Electron. 8 (2) (2012)
Kaushik Bhattacharyya, Pradip Mandal
A dynamically reconfigurable NRTI switched-capacitor-based hybrid DC-DC converter suitable for embedded applications. Microelectron. J. 42 (2) (2011)
Kaushik Bhattacharyya, Pradip Mandal
Technique for the reduction of output voltage ripple of switched capacitor-based DC??DC converters. IET Circuits Devices Syst. 5 (6) (2011)
Supriyo Maji, Pradip Mandal
A CAD methodology for automatic topology selection & sizing. SoCC (2011)
Supriyo Maji, Pradip Mandal
A geometric programming aided knowledge based approach for analog circuit synthesis and sizing. ACM Great Lakes Symposium on VLSI (2011)
Sabyasachi Deyati, Pradip Mandal
An automated design methodology for yield aware analog circuit synthesis in submicron technology. ISQED (2011)
Mrigank Sharad, P. Vijaya Sankara Rao, Pradip Mandal
A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture. VLSI Design (2011)
Supriyo Maji, Samiran Dam, Pradip Mandal
Automatic generation of saturation constraints and performance expressions for geometric programming based analog circuit sizing. ISQED (2011)
P. Vijaya Sankara Rao, Pradip Mandal
Current-mode full-duplex (CMFD) signaling for high-speed chip-to-chip interconnect. Microelectron. J. 42 (7) (2011)
P. Vijaya Sankara Rao, Pradip Mandal
A new power efficient current-mode 4-PAM transmitter interface for off-chip interconnect. APCCAS (2010)
P. Vijaya Sankara Rao, Pradip Mandal
Current-mode echo cancellation for full-duplex chip-to-chip data communication. APCCAS (2010)
Samiran DasGupta, Pradip Mandal
An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Sub-micron Technology. VLSI Design (2010)
Tamal Das, Pradip Mandal
On-Chip Inductor-Less DC-DC Boost Converter with Non-overlapped Rotational-Interleaving Scheme. VLSI Design (2010)
Tamal Das, Pradip Mandal
Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. VLSI Design (2009)
P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. ISLPED (2009)
Tamal Das, Pradip Mandal
Switched-Capacitor Based Buck Converter Design Using Current Limiter. J. Low Power Electron. 5 (3) (2009)
P. Vijaya Sankara Rao, Pradip Mandal, Sunil Sachdev
High-Speed Low-Current Duobinary Signaling Over Active Terminated Chip-to-Chip Interconnect. ISVLSI (2009)
Samiran DasGupta, Pradip Mandal
An automated design approach for CMOS LDO regulators. ASP-DAC (2009)
S. Krishna Kumar, P. Uday Bhaskar, Santanu Chattopadhyay, Pradip Mandal
Circuit Partitioning Using Particle Swarm Optimization for Pseudo-Exhaustive Testing. ARTCom (2009)
Kaushik Bhattacharyya, Pradip Mandal
A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter. VLSI Design (2008)
Saurav Bandyopadhyay, Pradip Mandal, Stephen E. Ralph, Kenneth Pedrotti
Integrated TIA-Equalizer for High Speed Optical Link. VLSI Design (2008)
A. V. Rejeesh, Pradip Mandal
A Fractional Frequency Synthesizer Using Frequency Locked Loop. ICECS (2007)
R. G. Raghavendra, Pradip Mandal
An On-Chip Voltage Regulator with Improved Load Regulation and Light Load Power Efficiency. VLSI Design (2006)
Kshitij Yadav, Pradip Mandal
Design and Analysis of a VHF OTA-C Cell for Optimum Phase Response. APCCAS (2006)
Gunjan Mandal, Pradip Mandal
Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface. ISCAS (3) (2005)
S. S. Prasad, Pradip Mandal
A single circuit solution for voltage sensors. ISCAS (4) (2005)
Ashis Maity, R. G. Raghavendra, Pradip Mandal
On-Chip Voltage Regulator with Improved Transient Response. VLSI Design (2005)
Debashis Mandal, Pradip Mandal
High voltage tolerant output buffer design for mixed voltage interfaces. ISCAS (5) (2005)
S. S. Prasad, Pradip Mandal
A CMOS Beta Multiplier Voltage Reference with Improved Temperature Performance and Silicon Tunability. VLSI Design (2004)
Gunjan Mandal, Pradip Mandal
Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation. ISCAS (1) (2004)
Pradip Mandal
A Narrow Pulse- Suppressing Filter For Input Buffer. VLSI Design (2004)
Pradip Mandal, V. Visvanathan
CMOS op-amp sizing using a geometric programming formulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (1) (2001)
Pradip Mandal, V. Visvanathan
A New Approach for CMOS Op-Amp Synthesis. VLSI Design (1999)
Pradip Mandal, V. Visvanathan
A Self-Biased High Performance Folded Cascode CMOS Op-Amp. VLSI Design (1997)
Pradip Mandal, V. Visvanathan
Design of high performance two stage CMOS cascode op-amps with stable biasing. VLSI Design (1996)
Pradip Mandal, V. Visvanathan
Macromodeling of the A.C. characteristics of CMOS Op-amps. ICCAD (1993)