P. Vijaya Sankara Rao

Publication Activity (10 Years)

Years Active: 2008-2014
Publications (10 Years): 0

Top Topics

Delay Insensitive

Top Venues

Int. J. Circuit Theory Appl.

Circuits Syst. Signal Process.

Publications

Ajinkya Kale, P. Vijaya Sankara Rao, J. Chattopadhyay
Design and simulation of a wideband channelized transceiver for DRFM applications. APCCAS (2014)
Divya Duvvuri, P. Vijaya Sankara Rao, J. Chattopadhyay
100-Mbps transceiver for enhanced MIL-STD-1553. APCCAS (2014)
P. Vijaya Sankara Rao, Pradip Mandal
Active-terminated transmitter and receiver circuits for high-speed low-swing duobinary signaling. Int. J. Circuit Theory Appl. 40 (4) (2012)
P. Vijaya Sankara Rao, Nachiket Desai, Pradip Mandal
A Low-Power 5-Gb/s Current-Mode LVDS Output Driver and Receiver with Active Termination. Circuits Syst. Signal Process. 31 (1) (2012)
Mrigank Sharad, P. Vijaya Sankara Rao, Pradip Mandal
A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture. VLSI Design (2011)
P. Vijaya Sankara Rao, Pradip Mandal
Current-mode full-duplex (CMFD) signaling for high-speed chip-to-chip interconnect. Microelectron. J. 42 (7) (2011)
P. Vijaya Sankara Rao, Pradip Mandal
A new power efficient current-mode 4-PAM transmitter interface for off-chip interconnect. APCCAS (2010)
P. Vijaya Sankara Rao, Pradip Mandal
Current-mode echo cancellation for full-duplex chip-to-chip data communication. APCCAS (2010)
P. Vijaya Sankara Rao, Pradip Mandal, Sunil Sachdev
High-Speed Low-Current Duobinary Signaling Over Active Terminated Chip-to-Chip Interconnect. ISVLSI (2009)
T. Venkata Kalyan, Madhu Mutyam, P. Vijaya Sankara Rao
Exploiting Variable Cycle Transmission for Energy-Efficient On-Chip Interconnect Design. VLSI Design (2008)