Qicheng Yu

Publication Activity (10 Years)

Years Active: 1994-2022
Publications (10 Years): 4

Top Venues

ISSCC

VLSI Circuits

IntelliSys (1)

IGARSS

London Metropolitan University, UK (PHD)

Education History

London Metropolitan University, UK

PHD

Publications

Arlindo Almada, Qicheng Yu, Preeti Patel
Proactive Chatbot Framework Based on the PS2CLH Model: An AI-Deep Learning Chatbot Assistant for Students. IntelliSys (1) (2022)
Siddharth Devarajan, Larry Singer, Dan Kelly, Steve Kosic, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow
16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology. ISSCC (2017)
Siddharth Devarajan, Larry Singer, Dan Kelly, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow, Gabriele Manganaro
A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology. IEEE J. Solid State Circuits 52 (12) (2017)
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Puckett, Andy Morgan, Ning Zhu, Qicheng Yu, Christopher Dillon, Bryce Gray, Jonathan Lanford, Matthew McShea, Ushma Mehta, Scott Bardsley, Peter R. Derounian, Ryan Bunch, Ralph Moore, Gerry Taylor
A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither. VLSI Circuits (2016)
Longli Liu, Yong Xue, Jingzun Zhang, Jia Liu, Qicheng Yu, Chi Li
Web service based Grid workflow application in quantitative remote sensing retrieval. IGARSS (2014)
Michael H. Perrott, Yunteng Huang, Rex T. Baird, Bruno W. Garlepp, Douglas Pastorello, Eric T. King, Qicheng Yu, Dan B. Kasha, Philip Steiner, Ligang Zhang, Jerrell P. Hein, Bruce Del Signore
A 2.5-Gb/s Multi-Rate 0.25-$\mu$m CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition. IEEE J. Solid State Circuits 41 (12) (2006)
Qicheng Yu, Carl Sechen
Efficient approximation of symbolic network functions using matroid intersection algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (10) (1997)
Qicheng Yu, Carl Sechen
Generation of colour-constrained spanning trees with application in symbolic circuit analysis. Int. J. Circuit Theory Appl. 24 (5) (1996)
Qicheng Yu, Carl Sechen
Efficient Approximation of Symbolic Network Function Using Matroid Intersection Algorithms. ISCAS (1995)
Qicheng Yu, Carl Sechen
Approximate symbolic analysis of large analog integrated circuits. ICCAD (1994)
Qicheng Yu, Carl Sechen
Generation of color-constrained spanning trees with application in symbolic circuit analysis. Great Lakes Symposium on VLSI (1994)

Qicheng Yu.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Qicheng Yu