Hüseyin Dinc

Publication Activity (10 Years)

Years Active: 2005-2020
Publications (10 Years): 3

Top Topics

Random Sampling

Radio Frequency

Camera Calibration

Top Venues

IEEE J. Solid State Circuits

Publications

Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Bardsley, Christopher Dillon, Mohit Kumar, Matthew McShea, Ryan Bunch, Joel Prabhakar, Scott Puckett
16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background Calibration. ISSCC (2020)
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Bardsley, Christopher Dillon, Matthew McShea, Joel Prabhakar, Scott Puckett
A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration. IEEE J. Solid State Circuits 55 (12) (2020)
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Puckett, Andy Morgan, Ning Zhu, Qicheng Yu, Christopher Dillon, Bryce Gray, Jonathan Lanford, Matthew McShea, Ushma Mehta, Scott Bardsley, Peter R. Derounian, Ryan Bunch, Ralph Moore, Gerry Taylor
A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither. VLSI Circuits (2016)
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Christopher Dillon, Scott Puckett, Bryce Gray, Carroll Speir, Jonathan Lanford, Janet Brunsilius, Peter R. Derounian, Brad Jeffries, Ushma Mehta, Matthew McShea, Russell Stop
A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration. IEEE J. Solid State Circuits 49 (12) (2014)
Ahmed M. Abdelatty Ali, Hüseyin Dinc, Paritosh Bhoraskar, Christopher Dillon, Scott Puckett, Bryce Gray, Carroll Speir, Jonathan Lanford, David Jarman, Janet Brunsilius, Peter R. Derounian, Brad Jeffries, Ushma Mehta, Matthew McShea, Ho-Young Lee
29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration. ISSCC (2014)
Ahmed M. A. Ali, Andrew S. Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Paritosh Bhoraskar, Hüseyin Dinc, Mike Hensley, Russell Stop, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed
A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration. IEEE J. Solid State Circuits 45 (12) (2010)
Hüseyin Dinc, Phillip E. Allen
A 1.2 GSample/s Double-Switching CMOS THA With -62 dB THD. IEEE J. Solid State Circuits 44 (3) (2009)
Erhan Ozalevli, Hüseyin Dinc, Haw-Jing Lo, Paul E. Hasler
Design of a binary-weighted resistor DAC using tunable linearized floating-gate CMOS resistors. CICC (2006)
Shengyuan Li, Susanta Sengupta, Hüseyin Dinc, Phillip E. Allen
CMOS high-linear wide-dynamic range RF on-chip filters using Q-enhanced LC filters. ISCAS (6) (2005)
Shengyuan Li, Hüseyin Dinc, Susanta Sengupta, Phillip E. Allen
A high-speed wide-range low-distortion constant-gm cell design for GHz applications. ISCAS (5) (2005)
Hüseyin Dinc, Phillip E. Allen, Sudipto Chakraborty
A low distortion, current feedback, programmable gain amplifier. ISCAS (5) (2005)