Pedro López

ORCID

Publication Activity (10 Years)

Years Active: 1993-2023
Publications (10 Years): 20

Top Venues

J. Parallel Distributed Comput.

Future Gener. Comput. Syst.

IEEE Trans. Computers

PDP

Publications

Francisco J. Andújar, Salvador Coll, Marina Alonso, Juan-Miguel Martínez, Pedro López, José L. Sánchez, Francisco J. Alfaro
Energy efficient HPC network topologies with on/off links. Future Gener. Comput. Syst. 139 (2023)
Pablo Andreu, Carles Hernández, Tomás Picornell, Pedro López, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella
End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform. CoRR (2022)
Ilya Tuzov, Pablo Andreu, Laura Medina, Tomás Picornell, Antonio Robles, Pedro López, Jose Flich, Carles Hernández
Improving the Robustness of Redundant Execution with Register File Randomization. ICCAD (2021)
Francisco J. Andújar, Salvador Coll, Marina Alonso, Juan-Miguel Martínez, Pedro López, José L. Sánchez, Francisco J. Alfaro, Raúl Martínez
Energy efficient torus networks with on/off links. J. Parallel Distributed Comput. 130 (2019)
Francisco J. Andújar, Salvador Coll, Marina Alonso, Pedro López, Juan-Miguel Martínez
POWAR: Power-Aware Routing in HPC Networks with On/Off Links. ACM Trans. Archit. Code Optim. 15 (4) (2019)
Pedro López, Elvira Baydal
Teaching high-performance service in a cluster computing course. J. Parallel Distributed Comput. 117 (2018)
Francisco J. Andujar, Salvador Coll, Marina Alonso, Juan-Miguel Martínez, Pedro López, Francisco J. Alfaro, José L. Sánchez, Raúl Martínez
Analyzing Topology Parameters for Achieving Energy-Efficient k-ary n-cubes. HiPINEB@HPCA (2018)
Roberto Peñaranda, Crispín Gómez Requena, María Engracia Gómez, Pedro López
XOR-based HoL-blocking reduction routing mechanisms for direct networks. Parallel Comput. 67 (2017)
Pedro López, Elvira Baydal
On a course on computer cluster configuration and administration. J. Parallel Distributed Comput. 105 (2017)
Roberto Peñaranda, María Engracia Gómez, Pedro López, Ernst Gunnar Gran, Tor Skeie
-indirect topologies based on intermediate nodes. Concurr. Comput. Pract. Exp. 29 (13) (2017)
Roberto Peñaranda, Ernst Gunnar Gran, Tor Skeie, María Engracia Gómez, Pedro López
A New Fault-Tolerant Routing Methodology for KNS Topologies. HiPINEB@HPCA (2016)
Roberto Peñaranda, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
The k-ary n-direct s-indirect family of topologies for large-scale interconnection networks. J. Supercomput. 72 (3) (2016)
Diego F. Bermúdez Garzón, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
A Family of Fault-Tolerant Efficient Indirect Topologies. IEEE Trans. Parallel Distributed Syst. 27 (4) (2016)
Francisco Almenar, Carlos Domínguez, Houcine Hassan, Juan-Miguel Martinez-Rubio, Pedro López
Embedded GPU and multicore processors for emotional-based mobile robotic agents. Future Gener. Comput. Syst. 56 (2016)
Diego F. Bermúdez Garzón, Crispín Gómez Requena, Pedro López, María Engracia Gómez
Speeding-up the fault-tolerance analysis of interconnection networks. HPCS (2015)
Roberto Peñaranda, Crispín Gómez Requena, María Engracia Gómez, Pedro López
XORAdap: A HoL-Blocking Aware Adaptive Routing Algorithm. PDP (2015)
Marina Alonso, Salvador Coll, Juan-Miguel Martínez, Vicente Santonja, Pedro López
Power consumption management in fat-tree interconnection networks. Parallel Comput. 48 (2015)
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
Design of Hybrid Second-Level Caches. IEEE Trans. Computers 64 (7) (2015)
Crispín Gómez Requena, Francisco Gilabert Villamón, María Engracia Gómez, Pedro López, José Duato
A HoL-blocking aware mechanism for selecting the upward path in fat-tree topologies. J. Supercomput. 71 (7) (2015)
Abel Martinez, Carlos Domínguez, Houcine Hassan, Juan-Miguel Martinez-Rubio, Pedro López
Using GPU and SIMD Implementations to Improve Performance of Robotic Emotional Processes. HPCC/CSS/ICESS (2015)
Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López
Efficient Register Renaming and Recovery for High-Performance Processors. IEEE Trans. Very Large Scale Integr. Syst. 22 (7) (2014)
Diego F. Bermúdez Garzón, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
FT-RUFT: A Performance and Fault-Tolerant Efficient Indirect Topology. PDP (2014)
Olav Lysne, Torsten Hoefler, Pedro López, Davide Bertozzi
Topic 13: High-Performance Networks and Communication - (Introduction). Euro-Par (2013)
Vicente Lorente, Alejandro Valero, Julio Sahuquillo, Salvador Petit, Ramon Canal, Pedro López, José Duato
Combining RAM technologies for hard-error recovery in L1 data caches working at very-low power modes. DATE (2013)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors. IEEE Trans. Computers 62 (5) (2013)
Roberto Peñaranda, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
Deterministic Routing with HoL-Blocking-Awareness for Direct Topologies. ICCS (2013)
Alejandro Valero, Salvador Petit, Julio Sahuquillo, Pedro López, José Duato
Design, Performance, and Energy Consumption of eDRAM/SRAM Macrocells for L1 Data Caches. IEEE Trans. Computers 61 (9) (2012)
Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López, José Duato
Progressive Congestion Management Based on Packet Marking and Validation Techniques. IEEE Trans. Computers 61 (9) (2012)
Roberto Peñaranda, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
A New Family of Hybrid Topologies for Large-Scale Interconnection Networks. NCA (2012)
Roberto Peñaranda, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
IODET: A HoL-blocking-aware Deterministic Routing Algorithm for Direct Topologies. ICPADS (2012)
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
Combining recency of information with selective random and a victim cache in last-level caches. ACM Trans. Archit. Code Optim. 9 (3) (2012)
Alejandro Valero, Julio Sahuquillo, Vicente Lorente, Salvador Petit, Pedro López, José Duato
Impact on Performance and Energy of the Retention Time and Processor Frequency in L1 Macrocell-Based Data Caches. IEEE Trans. Very Large Scale Integr. Syst. 20 (6) (2012)
Jose Flich, Tor Skeie, Andres Mejia, Olav Lysne, Pedro López, Antonio Robles, José Duato, Michihiro Koibuchi, Tomas Rokicki, José Carlos Sancho
A Survey and Evaluation of Topology-Agnostic Deterministic Routing Algorithms. IEEE Trans. Parallel Distributed Syst. 23 (3) (2012)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, David R. Kaeli
A Sequentially Consistent Multiprocessor Architecture for Out-of-Order Retirement of Instructions. IEEE Trans. Parallel Distributed Syst. 23 (8) (2012)
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
Analyzing the optimal ratio of SRAM banks in hybrid caches. ICCD (2012)
Diego F. Bermúdez Garzón, Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
Towards an Efficient Fat-Tree like Topology. Euro-Par (2012)
Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
How to reduce packet dropping in a bufferless NoC. Concurr. Comput. Pract. Exp. 23 (1) (2011)
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
Improving Last-Level Cache Performance by Exploiting the Concept of MRU-Tour. PACT (2011)
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
MRU-Tour-based Replacement Algorithms for Last-Level Caches. SBAC-PAD (2011)
Marina Alonso, Salvador Coll, Juan-Miguel Martínez, Vicente Santonja, Pedro López, José Duato
Power saving in regular interconnection networks. Parallel Comput. 36 (12) (2010)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, David R. Kaeli
Out-of-order retirement of instructions in sequentially consistent multiprocessors. ICCD (2010)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
Exploiting subtrace-level parallelism in clustered processors. PACT (2010)
Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López, José Duato
A Scalable and Early Congestion Management Mechanism for MINs. PDP (2010)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Houcine Hassan, Pedro López
Power Reduction In Advanced Embedded IPC Processors. Intell. Autom. Soft Comput. 15 (3) (2009)
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Vicente Lorente, Ramon Canal, Pedro López, José Duato
An hybrid eDRAM/SRAM macrocell to implement first-level data caches. MICRO (2009)
Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López
A power-aware hybrid RAM-CAM renaming mechanism for fast recovery. ICCD (2009)
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA (2009)
Andres Mejia, Maurizio Palesi, Jose Flich, Shashi Kumar, Pedro López, Rickard Holsmark, José Duato
Region-Based Routing: A Mechanism to Support Efficient Routing Algorithms in NoCs. IEEE Trans. Very Large Scale Integr. Syst. 17 (3) (2009)
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT (2009)
Daniele Ludovici, Francisco Gilabert Villamón, Simone Medardoni, Crispín Gómez Requena, María Engracia Gómez, Pedro López, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi
Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints. DATE (2009)
Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López, José Duato
An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions. DSD (2009)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López
Paired ROBs: A Cost-Effective Reorder Buffer Sharing Strategy for SMT Processors. Euro-Par (2009)
Noel Tomás, Julio Sahuquillo, Salvador Petit, Pedro López
Reducing the Number of Bits in the BTB to Attack the Branch Predictor Hot-Spot. Euro-Par (2008)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
The impact of out-of-order commit in coarse-grain, fine-grain and simultaneous multithreaded architectures. IPDPS (2008)
Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López, José Duato
On the Influence of the Packet Marking and Injection Control Schemes in Congestion Management for MINs. Euro-Par (2008)
Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
Exploiting Wiring Resources on Interconnection Network: Increasing Path Diversity. PDP (2008)
Crispín Gómez Requena, Francisco Gilabert Villamón, María Engracia Gómez, Pedro López, José Duato
Beyond Fat-tree: Unidirectional Load--Balanced Multistage Interconnection Network. IEEE Comput. Archit. Lett. 7 (2) (2008)
Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
Reducing Packet Dropping in a Bufferless NoC. Euro-Par (2008)
Francisco Gilabert Villamón, Simone Medardoni, Davide Bertozzi, Luca Benini, María Engracia Gómez, Pedro López, José Duato
Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework. NOCS (2008)
Crispín Gómez Requena, María Engracia Gómez, Pedro López, José Duato
An Efficient Fault-Tolerant Routing Methodology for Fat-Tree Interconnection Networks. ISPA (2007)
Jose Flich, Andres Mejia, Pedro López, José Duato
Region-Based Routing: An Efficient Routing Mechanism to Tackle Unreliable Hardware in Network on Chips. NOCS (2007)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Houcine Hassan, Pedro López
Leakage Current Reduction in Data Caches on Embedded Systems. IPC (2007)
Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López, José Duato
Congestion Management in MINs through Marked and Validated Packets. PDP (2007)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López
Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors. SBAC-PAD (2007)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
VB-MT: Design Issues and Performance of the Validation Buffer Microarchitecture for Multithreaded Processors. PACT (2007)
Marina Alonso, Salvador Coll, Vicente Santonja, Juan-Miguel Martínez, Pedro López, José Duato
Power-Aware Fat-Tree Networks Using On/Off Links. HPCC (2007)
Crispín Gómez Requena, Francisco Gilabert Villamón, María Engracia Gómez, Pedro López, José Duato
Deterministic versus Adaptive Routing in Fat-Trees. IPDPS (2007)
María Engracia Gómez, Nils Agne Nordbotten, Jose Flich, Pedro López, Antonio Robles, José Duato, Tor Skeie, Olav Lysne
A Routing Methodology for Achieving Fault Tolerance in Direct Networks. IEEE Trans. Computers 55 (4) (2006)
Francisco Gilabert Villamón, María Engracia Gómez, Pedro López, José Duato
On the Influence of the Selection Function on the Performance of Fat-Trees. Euro-Par (2006)
María Engracia Gómez, Pedro López, José Duato
FIR: An efficient routing strategy for tori and meshes. J. Parallel Distributed Comput. 66 (7) (2006)
Marina Alonso, Salvador Coll, Juan-Miguel Martínez, Vicente Santonja, Pedro López, José Duato
Dynamic power saving in fat-tree interconnection networks using on/off links. IPDPS (2006)
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Pedro López
Applying the zeros switch-off technique to reduce static energy in data caches. SBAC-PAD (2006)
Gaspar Mora, Jose Flich, José Duato, Pedro López, Elvira Baydal, Olav Lysne
Towards an efficient switch architecture for high-radix switches. ANCS (2006)
María Engracia Gómez, Pedro López, José Duato
An Efficient Fault-Tolerant Routing Strategy for Tori and Meshes. Scalable Comput. Pract. Exp. 7 (3) (2006)
María Engracia Gómez, Pedro López, José Duato
A Memory-Effective Routing Strategy for Regular Interconnection Networks. IPDPS (2005)
Juan Carlos Martínez, Jose Flich, Antonio Robles, Pedro López, José Duato, Michihiro Koibuchi
In-Order Packet Delivery in Interconnection Networks using Adaptive Routing. IPDPS (2005)
María Engracia Gómez, Pedro López, José Duato
A Memory-Effective Fault-Tolerant Routing Strategy for Direct Interconnection Networks. ISPDC (2005)
Marina Alonso, Juan-Miguel Martínez, Vicente Santonja, Pedro López, José Duato
Power Saving in Regular Interconnection Networks Built with High-Degree Switches. IPDPS (2005)
Michihiro Koibuchi, Juan Carlos Martínez, Jose Flich, Antonio Robles, Pedro López, José Duato
Enforcing in-order packet delivery in system area networks with adaptive routing. J. Parallel Distributed Comput. 65 (10) (2005)
Elvira Baydal, Pedro López, José Duato
A Family of Mechanisms for Congestion Control in Wormhole Networks. IEEE Trans. Parallel Distributed Syst. 16 (9) (2005)
María Engracia Gómez, José Duato, Jose Flich, Pedro López, Antonio Robles, Nils Agne Nordbotten, Olav Lysne, Tor Skeie
An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori. IEEE Comput. Archit. Lett. 3 (2004)
Tor Skeie, Olav Lysne, Jose Flich, Pedro López, Antonio Robles, José Duato
LASH-TOR: A Generic Transition-Oriented Routing Algorithm. ICPADS (2004)
Marina Alonso, Juan-Miguel Martínez, Vicente Santonja, Pedro López
Reducing Power Consumption in Interconnection Networks by Dynamically Adjusting Link Width. Euro-Par (2004)
María Engracia Gómez, José Duato, Jose Flich, Pedro López, Antonio Robles, Nils Agne Nordbotten, Tor Skeie, Olav Lysne
A New Adaptive Fault-Tolerant Routing Methodology for Direct Networks. HiPC (2004)
José Miguel Montañana, Jose Flich, Antonio Robles, Pedro López, José Duato
A Transition-Based Fault-Tolerant Routing Methodology for InfiniBand Networks. IPDPS (2004)
Nils Agne Nordbotten, María Engracia Gómez, Jose Flich, Pedro López, Antonio Robles, Tor Skeie, Olav Lysne, José Duato
A Fully Adaptive Fault-Tolerant Routing Methodology Based on Intermediate Nodes. NPC (2004)
María Engracia Gómez, Jose Flich, Pedro López, Antonio Robles, José Duato, Nils Agne Nordbotten, Olav Lysne, Tor Skeie
An Effective Fault-Tolerant Routing Methodology for Direct Networks. ICPP (2004)
Juan Carlos Martínez, Jose Flich, Antonio Robles, Pedro López, José Duato
Supporting Adaptive Routing in InfiniBand Networks. PDP (2003)
Juan Carlos Martínez, Jose Flich, Antonio Robles, Pedro López, José Duato
Supporting Fully Adaptive Routing in InfiniBand Networks. IPDPS (2003)
José Carlos Sancho, Antonio Robles, Pedro López, Jose Flich, José Duato
Routing in InfiniBandTM Torus Network Topologie. ICPP (2003)
Juan-Miguel Martinez-Rubio, Pedro López, José Duato
FC3D: Flow Control-Based Distributed Deadlock Detection Mechanism for True Fully Adaptive Routing in Wormhole Networks. IEEE Trans. Parallel Distributed Syst. 14 (8) (2003)
Jose Flich, Pedro López, Manuel P. Malumbres, José Duato, Tomas Rokicki
Applying In-Transit Buffers to Boost the Performance of Networks with Source Routing. IEEE Trans. Computers 52 (9) (2003)
Pedro López, Jose Flich, Antonio Robles
. Euro-Par (2003)
José Carlos Sancho, Juan Carlos Martínez, Antonio Robles, Pedro López, Jose Flich, José Duato
Performance Evaluation of COWs under Real Parallel Application. IPDPS (2003)
María Engracia Gómez, Jose Flich, Antonio Robles, Pedro López, José Duato
VOQSW: A Methodology to Reduce HOL Blocking in InfiniBand Networks. IPDPS (2003)
Juan Carlos Martínez, Jose Flich, Antonio Robles, Pedro López, José Duato
Supporting adaptive routing in IBA switches. J. Syst. Archit. 49 (10-11) (2003)
Elvira Baydal, Pedro López
A Robust Mecahnism for Congestion Control: INC. Euro-Par (2003)
Elvira Baydal, Pedro López, José Duato
Increasing the Adaptivity of Routing Algorithms for k-ary n-cubes. PDP (2002)
Jose Flich, Pedro López, Manuel P. Malumbres, José Duato
Boosting the Performance of Myrinet Networks. IEEE Trans. Parallel Distributed Syst. 13 (7) (2002)
Jose Flich, Pedro López, José Carlos Sancho, Antonio Robles, José Duato
Improving InfiniBand Routing through Multiple Virtual Networks. ISHPC (2002)

Pedro López.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Pedro López