Alejandro Martínez

Publication Activity (10 Years)

Years Active: 2005-2022
Publications (10 Years): 10

Top Topics

Hardware Software

Top Venues

Publications

Salvatore Mangano, Enrique Vega, Alejandro Martínez, Daniel Alfonso-Corcuera, Ángel Sanz-Andrés, Santiago Pindado
Performance Monitoring of Mast-Mounted Cup Anemometers Multivariate Analysis with ROOT. Sensors 22 (24) (2022)
Laura Mercadé, Maria Morant, Amadeu Griol, Roberto Llorente, Alejandro Martínez
Optical Up/Down-conversion of OFDM Wireless Signals based on Ultracompact Silicon Optomechanical Cavities. OFC (2021)
Stefano Mammola, Diego Fontaneto, Alejandro Martínez, Filipe Chichorro
Impact of the reference list features on the number of citations. Scientometrics 126 (1) (2021)
Rakesh Kumar, Alejandro Martínez, Antonio Gonzalez
A Variable Vector Length SIMD Architecture for HW/SW Co-designed Processors. CoRR (2021)
Adrià Barja, Alejandro Martínez, Alex Arenas, Pablo Fleurquin, Jordi Nin, José J. Ramasco, Elena Tomás
Assessing the risk of default propagation in interconnected sectoral financial networks. EPJ Data Sci. 8 (1) (2019)
Rakesh Kumar, José Cano, Aleksandar Brankovic, Demos Pavlou, Kyriakos Stavrou, Enric Gibert, Alejandro Martínez, Antonio Gonzalez
HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation. ISPASS (2017)
Gem Dot, Alejandro Martínez, Antonio González
Removing checks in dynamically typed languages through efficient profiling. CGO (2017)
Rakesh Kumar, Alejandro Martínez, Antonio González
Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned Environment. ACM Trans. Comput. Syst. 33 (4) (2016)
José Cano, Rakesh Kumar, Aleksandar Brankovic, Demos Pavlou, Kyriakos Stavrou, Enric Gibert, Alejandro Martínez, Antonio González
Quantitative characterization of the software layer of a HW/SW co-designed processor. IISWC (2016)
Gem Dot, Alejandro Martínez, Antonio González
ERICO: Effective Removal of Inline Caching Overhead in Dynamic Typed Languages. HiPC (2016)
Gem Dot, Alejandro Martínez, Antonio González
Analysis and Optimization of Engines for Dynamically Typed Languages. SBAC-PAD (2015)
Rakesh Kumar, Alejandro Martínez, Antonio González
Efficient Power Gating of SIMD Accelerators Through Dynamic Selective Devectorization in an HW/SW Codesigned Environment. ACM Trans. Archit. Code Optim. 11 (3) (2014)
Sepehr P. Khaligh, Alejandro Martínez, Farbod Fahimi, Charles Robert Koch
A HIL Testbed for Initial Controller Gain Tuning of a Small Unmanned Helicopter. J. Intell. Robotic Syst. 73 (1-4) (2014)
Rakesh Kumar, Alejandro Martínez, Antonio González
Speculative dynamic vectorization to assist static vectorization in a HW/SW co-designed environment. HiPC (2013)
Raquel Martínez, José Manuel Cadenas, M. Carmen Garrido, Alejandro Martínez
Imputing missing values from low quality data by NIP tool. FUZZ-IEEE (2013)
Rakesh Kumar, Alejandro Martínez, Antonio González
Dynamic Selective Devectorization for Efficient Power Gating of SIMD Units in a HW/SW Co-Designed Environment. SBAC-PAD (2013)
Rakesh Kumar, Alejandro Martínez, Antonio González
Vectorizing for Wider Vector Units in a HW/SW Co-designed Environment. HPCC/EUC (2013)
Rodrigo Pascual, Alejandro Martínez, Ricardo Giesen
Joint optimization of fleet size and maintenance capacity in a fork-join cyclical transportation system. J. Oper. Res. Soc. 64 (7) (2013)
Mar Pérez-Sanagustín, Alejandro Martínez, Carlos Delgado Kloos
etiquetAR: Tagging Learning Experiences. EC-TEL (2013)
Rakesh Kumar, Alejandro Martínez, Antonio González
Speculative dynamic vectorization for HW/SW co-designed processors. PACT (2012)
José Manuel Cadenas, M. Carmen Garrido, Alejandro Martínez, Raquel Martínez
Consensus operators for decision making in Fuzzy Random Forest ensemble. ISDA (2011)
Alejandro Martínez, Pedro Javier García, Francisco José Alfaro, José L. Sánchez, Jose Flich, Francisco J. Quiles, José Duato
A Switch Architecture Guaranteeing QoS Provision and HOL Blocking Elimination. IEEE Trans. Parallel Distributed Syst. 20 (1) (2009)
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA (2009)
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT (2009)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato
Efficient Switches with QoS Support for Clusters. IPDPS (2007)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato
Deadline-based QoS Algorithms for High-performance Networks. IPDPS (2007)
Alejandro Martínez, Raúl Martínez, Francisco José Alfaro, José L. Sánchez
A low-cost strategy to provide full QoS support in Advanced Switching networks. J. Syst. Archit. 53 (7) (2007)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato
Providing Full QoS with 2 VCs in High-Speed Switches. ICOIN (2007)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, Francisco J. Quiles, José Duato
A New Cost-Effective Technique for QoS Support in Clusters. IEEE Trans. Parallel Distributed Syst. 18 (12) (2007)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato
Scalable Low-Cost QoS Support for Single-chip Switches. ICPADS (1) (2006)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato
Full QoS Support with 2 VCs for Single-chip Switches. NCA (2006)
Alejandro Martínez, George Apostolopoulos, Francisco José Alfaro, José L. Sánchez, José Duato
QoS Support for Video Transmission in High-Speed Interconnects. HPCC (2006)
Alejandro Martínez, Pedro Javier García, Francisco José Alfaro, José L. Sánchez, Jose Flich, Francisco J. Quiles, José Duato
Towards a Cost-Effective Interconnection Network Architecture with QoS and Congestion Management Support. Euro-Par (2006)
Alejandro Martínez, Francisco José Alfaro, José L. Sánchez, José Duato
Providing Full QoS Support in Clusters Using Only Two VCs at the Switches. HiPC (2005)