A Variable Vector Length SIMD Architecture for HW/SW Co-designed Processors.
Rakesh KumarAlejandro MartínezAntonio GonzalezPublished in: CoRR (2021)
Keyphrases
- hardware software
- hw sw
- parallel algorithm
- processor array
- single instruction multiple data
- parallel processing
- design methodology
- parallel architectures
- parallel architecture
- real time
- high performance computing
- massively parallel
- processing elements
- hardware software co design
- multi core processors
- parallel execution
- mesh connected
- parallel computers
- parallel processors
- hardware and software
- hardware design
- computer architecture
- instruction set
- computational power
- embedded systems
- fine grained
- genetic programming
- source code