Michael Schaffner

ORCID

Publication Activity (10 Years)

Years Active: 2012-2022
Publications (10 Years): 27

Top Venues

CoRR

DATE

IEEE Trans. Instrum. Meas.

VCIP

ETH Zürich, Switzerland (PHD)

Education History

ETH Zürich, Switzerland

PHD

Publications

Pascal Nasahl, Miguel Osorio, Pirmin Vogel, Michael Schaffner, Timothy Trippel, Dominic Rizzo, Stefan Mangard
SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element. CoRR (2022)
Pascal Nasahl, Miguel Osorio, Pirmin Vogel, Michael Schaffner, Timothy Trippel, Dominic Rizzo, Stefan Mangard
SYNFI: Pre-Silicon Fault Analysis of an Open-Source Secure Element. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022 (4) (2022)
Jonathan Balkind, Katie Lim, Michael Schaffner, Fei Gao, Grigory Chirkov, Ang Li, Alexey Lavrov, Tri M. Nguyen, Yaosheng Fu, Florian Zaruba, Kunal Gulati, Luca Benini, David Wentzlaff
BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research. ASPLOS (2020)
Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gürkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. COOL CHIPS (2020)
Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini
Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
Fabian Schuiki, Michael Schaffner, Luca Benini
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI. DATE (2019)
Salvatore Di Girolamo, Konstantin Taranov, Andreas Kurth, Michael Schaffner, Timo Schneider, Jakub Beránek, Maciej Besta, Luca Benini, Duncan Roweth, Torsten Hoefler
Network-Accelerated Non-Contiguous Memory Transfers. CoRR (2019)
Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. IEEE Trans. Computers 68 (4) (2019)
Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini
Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI. CoRR (2019)
Fabian Schuiki, Michael Schaffner, Luca Benini
NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI. ISOCC (2019)
Jiawei Liao, Michael Jost, Michael Schaffner, Michele Magno, Matthias Korb, Luca Benini, Felix Tebbenjohanns, René Reimann, Vijay Jain, Michael Gross, Andrei Militaru, Martin Frimmer, Lukás Novotný
FPGA Implementation of a Kalman-Based Motion Estimator for Levitated Nanoparticles. IEEE Trans. Instrum. Meas. 68 (7) (2019)
Salvatore Di Girolamo, Konstantin Taranov, Andreas Kurth, Michael Schaffner, Timo Schneider, Jakub Beránek, Maciej Besta, Luca Benini, Duncan Roweth, Torsten Hoefler
Network-accelerated non-contiguous memory transfers. SC (2019)
Fabian Schuiki, Michael Schaffner, Luca Benini
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI. CoRR (2018)
Andrin Caviezel, Michael Schaffner, Lukas Cavigelli, Pascal Niklaus, Yves Bühler, Perry Bartelt, Michele Magno, Luca Benini
Design and Evaluation of a Low-Power Sensor Device for Induced Rockfall Experiments. IEEE Trans. Instrum. Meas. 67 (4) (2018)
Michael Schaffner, Luca Benini
On the Feasibility of FPGA Acceleration of Molecular Dynamics Simulations. CoRR (2018)
Manuel Eggimann, Christelle Gloor, Florian Scheidegger, Lukas Cavigelli, Michael Schaffner, Aljosa Smolic, Luca Benini
Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS. ISCAS (2018)
Michael Jost, Michael Schaffner, Michele Magno, Matthias Korb, Luca Benini, René Reimann, Vijay Jain, Michael Gross, Andrei Militaru, Martin Frimmer, Lukás Novotný
An accurate system for optimal state estimation of a levitated nanoparticle. SAS (2018)
Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. CoRR (2018)
A. Cristiano I. Malossi, Michael Schaffner, Anca Molnos, Luca Gammaitoni, Giuseppe Tagliavini, Andrew Emerson, Andrés Tomás, Dimitrios S. Nikolopoulos, Eric Flamand, Norbert Wehn
The transprecision computing paradigm: Concept, design, and applications. DATE (2018)
Michael Schaffner, Florian Scheidegger, Lukas Cavigelli, Hubert Kaeslin, Luca Benini, Aljosa Smolic
Towards Edge-Aware Spatio-Temporal Filtering in Real-Time. IEEE Trans. Image Process. 27 (1) (2018)
Manuel Eggimann, Christelle Gloor, Florian Scheidegger, Lukas Cavigelli, Michael Schaffner, Aljosa Smolic, Luca Benini
Hydra: An Accelerator for Real-Time Edge-Aware Permeability Filtering in 65nm CMOS. CoRR (2017)
Florian Scheidegger, Lukas Cavigelli, Michael Schaffner, A. Cristiano I. Malossi, Constantine Bekas, Luca Benini
Impact of temporal subsampling on accuracy and performance in practical video classification. EUSIPCO (2017)
Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini
An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. IEEE J. Solid State Circuits 52 (1) (2017)
Michael Schaffner, Frank K. Gürkaynak, Pierre Greisen, Hubert Kaeslin, Luca Benini, Aljosa Smolic
Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion Using IDW. IEEE Trans. Circuits Syst. Video Technol. 26 (11) (2016)
Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini
Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters. ARITH (2016)
Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini
4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. ISSCC (2016)
Youri Popoff, Florian Scheidegger, Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini
High-efficiency logarithmic number unit design based on an improved cotransformation scheme. DATE (2016)
Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Luca Benini
DRAM or no-DRAM?: exploring linear solver architectures for image domain warping in 28 nm CMOS. DATE (2015)
Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljosa Smolic
Automatic multiview synthesis - Prototype demo. VCIP (2015)
Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljosa Smolic
Automatic multiview synthesis - Towards a mobile system on a chip. VCIP (2015)
Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini
An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing. DAC (2014)
Michael Schaffner, Pascal Hager, Lukas Cavigelli, Pierre Greisen, Frank K. Gürkaynak, Hubert Kaeslin
A real-time 720p feature extraction core based on Semantic Kernels Binarized. VLSI-SoC (2013)
Michael Schaffner, Pierre Greisen, Simon Heinzle, Frank K. Gürkaynak, Hubert Kaeslin, Aljoscha Smolic
MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping. ESSCIRC (2013)
Michael Schaffner, Pierre Greisen, Simon Heinzle, Aljoscha Smolic
Efficient image resampling for multiview displays. ICASSP (2013)
Michael Schaffner, Pascal A. Hager, Lukas Cavigelli, Z. Fang, Pierre Greisen, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini
A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized. VLSI-SoC (Selected Papers) (2013)
Pierre Greisen, Richard Emler, Michael Schaffner, Simon Heinzle, Frank K. Gürkaynak
A general-transformation EWA view rendering engine for 1080p video in 130 nm CMOS. VLSI-SoC (2012)
Pierre Greisen, Michael Schaffner, Simon Heinzle, Marian Runo, Aljoscha Smolic, Andreas Burg, Hubert Kaeslin, Markus H. Gross
Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications. IEEE Trans. Circuits Syst. Video Technol. 22 (11) (2012)
Pierre Greisen, Michael Schaffner, Danny Luu, Val Mikos, Simon Heinzle, Frank K. Gürkaynak, Aljoscha Smolic
Spatially-Varying Image Warping: Evaluations and VLSI Implementations. VLSI-SoC (Selected Papers) (2012)

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Publication Activity (10 Years)

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Michael Schaffner