Fabian Schuiki

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 32

Top Topics

Intermediate Representation

Description Languages

Energy Efficiency

Top Venues

IEEE Trans. Computers

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini
Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra. CoRR (2023)
Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini
Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra. IEEE Trans. Parallel Distributed Syst. 34 (12) (2023)
Andreas Kurth, Wolfgang Rönninger, Thomas Benz, Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Luca Benini
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication. IEEE Trans. Computers 71 (8) (2022)
Florian Zaruba, Fabian Schuiki, Luca Benini
Manticore: A 4096-Core RISC-V Chiplet Architecture for Ultraefficient Floating-Point Computing. IEEE Micro 41 (2) (2021)
Fabian Schuiki, Florian Zaruba, Torsten Hoefler, Luca Benini
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores. IEEE Trans. Computers 70 (2) (2021)
Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini
FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. IEEE Trans. Very Large Scale Integr. Syst. 29 (4) (2021)
Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. DATE (2021)
Thomas Benz, Luca Bertaccini, Florian Zaruba, Fabian Schuiki, Frank K. Gürkaynak, Luca Benini
A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range. ESSCIRC (2021)
Andreas Kurth, Fabian Schuiki, Luca Benini
Implementing CNN Layers on the Manticore Cluster-Based Many-Core Architecture. CoRR (2021)
Samuel Riedel, Fabian Schuiki, Paul Scheffler, Florian Zaruba, Luca Benini
Banshee: A Fast LLVM-Based RISC-V Binary Translator. ICCAD (2021)
Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini
Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads. IEEE Trans. Computers 70 (11) (2021)
Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini
Snitch: A 10 kGE Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads. CoRR (2020)
Paul Scheffler, Florian Zaruba, Fabian Schuiki, Torsten Hoefler, Luca Benini
Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. CoRR (2020)
Matheus A. Cavalcante, Andreas Kurth, Fabian Schuiki, Luca Benini
Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems. CF (2020)
Alfio Di Mauro, Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini
Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology. ISCAS (2020)
Andreas Kurth, Wolfgang Rönninger, Thomas Benz, Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Luca Benini
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication. CoRR (2020)
Fabian Schuiki, Andreas Kurth, Tobias Grosser, Luca Benini
LLHD: A Multi-level Intermediate Representation for Hardware Description Languages. CoRR (2020)
Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gürkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini
XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. COOL CHIPS (2020)
Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini
Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini
FPnew: An Open-Source Multi-Format Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. CoRR (2020)
Florian Zaruba, Fabian Schuiki, Luca Benini
A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing. Hot Chips Symposium (2020)
Fabian Schuiki, Andreas Kurth, Tobias Grosser, Luca Benini
LLHD: a multi-level intermediate representation for hardware description languages. PLDI (2020)
Florian Zaruba, Fabian Schuiki, Luca Benini
Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing. CoRR (2020)
Fabian Schuiki, Michael Schaffner, Luca Benini
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI. DATE (2019)
Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. IEEE Trans. Computers 68 (4) (2019)
Stefan Mach, Fabian Schuiki, Florian Zaruba, Luca Benini
A 0.80pJ/flop, 1.24Tflop/sW 8-to-64 bit Transprecision Floating-Point Unit for a 64 bit RISC-V Processor in 22nm FD-SOI. VLSI-SoC (2019)
Fabian Schuiki, Florian Zaruba, Torsten Hoefler, Luca Benini
Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores. CoRR (2019)
Matheus A. Cavalcante, Fabian Schuiki, Florian Zaruba, Michael Schaffner, Luca Benini
Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI. CoRR (2019)
Fabian Schuiki, Michael Schaffner, Luca Benini
NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI. ISOCC (2019)
Florian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini
The Floating Point Trinity: A Multi-modal Approach to Extreme Energy-Efficiency and Performance. ICECS (2019)
Fabian Schuiki, Michael Schaffner, Luca Benini
NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI. CoRR (2018)
Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak, Luca Benini
A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. CoRR (2018)
Mahdi Asadpour, Mario Burger, Fabian Schuiki, Karin Anna Hummel
Needle in a Haystack: Limiting the Search Space in Mission-aware Packet Forwarding for Drones. SmartObjects@MobiCom (2015)