Ismet Bayraktaroglu

Publication Activity (10 Years)

Years Active: 1997-2023
Publications (10 Years): 1

Top Topics

Top Venues

Publications

Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren
ChipNeMo: Domain-Adapted LLMs for Chip Design. CoRR (2023)
Ismet Bayraktaroglu, Jim Hunt, Daniel Watkins
Cache Resident Functional Microprocessor Testing: Avoiding High Speed IO Issues. ITC (2006)
Ismet Bayraktaroglu, Alex Orailoglu
The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations. IEEE Trans. Computers 54 (1) (2005)
Ismet Bayraktaroglu, Olivier Caty, Yickkei Wong
Highly Configurable Programmable Built-In Self Test Architecture for High-Speed Memories. VTS (2005)
Olivier Caty, Peter Dahlgren, Ismet Bayraktaroglu
Microprocessor silicon debug based on failure propagation tracing. ITC (2005)
Ismet Bayraktaroglu, Manuel d'Abreu
ATPG based functional test for data paths: application to a floating point unit. HLDVT (2004)
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu
Seamless Test of Digital Components in Mixed-Signal Paths. IEEE Des. Test Comput. 21 (1) (2004)
Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu
Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test. IEEE Trans. Reliab. 53 (2) (2004)
Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
Test application time and volume compression through seed overlapping. DAC (2003)
Ismet Bayraktaroglu, Alex Orailoglu
Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs. IEEE Trans. Computers 52 (11) (2003)
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
Reducing Average and Peak Test Power Through Scan Chain Modification. J. Electron. Test. 19 (4) (2003)
Ismet Bayraktaroglu, Alex Orailoglu
Decompression Hardware Determination for Test Volume and Time Reduction through Unified Test Pattern Compaction and Compression. VTS (2003)
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar, Richard Lee, John Bell, Lisa Curhan
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects. ITC (2003)
Ismet Bayraktaroglu, Alex Orailoglu
Gate Level Fault Diagnosis in Scan-Based BIST. DATE (2002)
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
Scan Power Reduction Through Test Data Transition Frequency Analysis. ITC (2002)
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
Dynamic test data transformations for average and peak power reductions. ETW (2002)
Ismet Bayraktaroglu, Alex Orailoglu
Cost-Effective Deterministic Partitioning for Rapid Diagnosis in Scan-Based BIST. IEEE Des. Test Comput. 19 (1) (2002)
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
Test Power Reduction through Minimization of Scan Chain Transitions. VTS (2002)
Ismet Bayraktaroglu, Alex Orailoglu
Test Volume and Application Time Reduction Through Scan Chain Concealment. DAC (2001)
Ismet Bayraktaroglu, Alex Orailoglu
Diagnosis for scan-based BIST: reaching deep into the signatures. DATE (2001)
Ismet Bayraktaroglu, Alex Orailoglu
Concurrent test for digital linear systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (9) (2001)
Ismet Bayraktaroglu, Alex Orailoglu
Improved Methods for Fault Diagnosis in Scan-Based BIST. LATW (2001)
Ismet Bayraktaroglu, Alex Orailoglu
Selecting a PRPG: Randomness, Primitiveness, or Sheer Luck? Asian Test Symposium (2001)
Ismet Bayraktaroglu, Alex Orailoglu
Cost effective digital filter design for concurrent test. ICASSP (2000)
Ismet Bayraktaroglu, Alex Orailoglu
Unifying methodologies for high fault coverage concurrent and off-line test of digital filters. ISCAS (2000)
Ismet Bayraktaroglu, Alex Orailoglu
Low cost concurrent test implementation for linear digital systems. ETW (2000)
Ismet Bayraktaroglu, Alex Orailoglu
Accumulation-based concurrent fault detection for linear digital state variable systems. Asian Test Symposium (2000)
Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu
Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. VTS (2000)
Ismet Bayraktaroglu, Alex Orailoglu
Deterministic partitioning techniques for fault diagnosis in scan-based BIST. ITC (2000)
Ismet Bayraktaroglu, Alex Orailoglu
Improved fault diagnosis in scan-based BIST via superposition. DAC (2000)
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu
Test Synthesis for Mixed-Signal SOC Paths. DATE (2000)
Ismet Bayraktaroglu, Arif Selçuk Ögrenci, Günhan Dündar, Sina Balkir, Ethem Alpaydin
ANNSyS: an Analog Neural Network Synthesis System. Neural Networks 12 (2) (1999)
Ismet Bayraktaroglu, Alex Orailoglu
Low-Cost On-Line Test for Digital Filters. VTS (1999)
Ismet Bayraktaroglu, K. Udawatta, Alex Orailoglu
An Examination of PRPG Selection Approaches for Large, Industrial Designs. Asian Test Symposium (1998)
Ismet Bayraktaroglu, Arif Selçuk Ögrenci, Günhan Dündar, Sina Balkir, Ethem Alpaydin
ANNSyS (an analog neural network synthesis system). ICNN (1997)