Gwan S. Choi

Publication Activity (10 Years)

Years Active: 1992-2022
Publications (10 Years): 14

Top Topics

Error Correction

Decoding Algorithm

Top Venues

Int. J. Circuit Theory Appl.

Publications

Sina Pourjabar, Gwan S. Choi
A high-throughput multimode low-density parity-check decoder for 5G New Radio. Int. J. Circuit Theory Appl. 50 (4) (2022)
Sina Pourjabar, Gwan S. Choi
CVR: A Continuously Variable Rate LDPC Decoder Using Parity Check Extension for Minimum Latency. J. Signal Process. Syst. 93 (8) (2021)
Tiben Che, Gwan S. Choi
An Encoding Scheme with Constituent Codes Optimization for Polar Code-Aim to Reduce the Decoding Latency. CoRR (2016)
Tiben Che, Gwan S. Choi
An Efficient Partial Sums Generator for Constituent Code based Successive Cancellation Decoding of Polar Codes. CoRR (2016)
Tiben Che, Jingwei Xu, Gwan S. Choi
Overlapped list successive cancellation approach for hardware efficient polar code decoder. ISCAS (2016)
Mehnaz Rahman, Gwan S. Choi
Hardware Architecture of Complex K-best MIMO Decoder. CoRR (2016)
Tiben Che, Jingwei Xu, Gwan S. Choi
TC: Throughput centric successive cancellation decoder hardware implementation for polar codes. ICASSP (2016)
Jingwei Xu, Tiben Che, Gwan S. Choi
XJ-BP: Express Journey Belief Propagation Decoding for Polar Codes. CoRR (2015)
Jingwei Xu, Tiben Che, Gwan S. Choi
XJ-BP: Express Journey Belief Propagation Decoding for Polar Codes. GLOBECOM (2015)
Mehnaz Rahman, Ehsan Rohani, Gwan S. Choi
An iterative LR-aided MMSE extended soft MIMO decoding algorithm. ICNC (2015)
Mehnaz Rahman, Gwan S. Choi
Fixed Point Realization of Iterative LR-Aided Soft MIMO Decoding Algorithm. CoRR (2015)
Tiben Che, Jingwei Xu, Gwan S. Choi
TC: Throughput Centric Successive Cancellation Decoder Hardware Implementation for Polar Codes. CoRR (2015)
Jingwei Xu, Gwan S. Choi
Compressive sensing and reception for MIMO-OFDM based cognitive radio. ICNC (2015)
Tiben Che, Jingwei Xu, Gwan S. Choi
Overlapped List Successive Cancellation Approach for Hardware Efficient Polar Code Decoder. CoRR (2015)
Mehnaz Rahman, Ehsan Rohani, Gwan S. Choi
An iterative soft decision based adaptive K-best decoder without SNR estimation. ACSSC (2014)
Yoon Seok Yang, Reeshav Kumar, Gwan S. Choi, Paul V. Gratz
WaveSync: Low-Latency Source-Synchronous Bypass Network-on-Chip Architecture. ACM Trans. Design Autom. Electr. Syst. 19 (4) (2014)
Reeshav Kumar, Hrishikesh Deshpande, Gwan S. Choi, Alexander Sprintson, Paul Gratz
Bidirectional interconnect design for low latency high bandwidth NoC. ICICDT (2013)
Yoon Seok Yang, Hrishikesh Deshpande, Gwan S. Choi, Paul Gratz
Exploiting path diversity for low-latency and high-bandwidth with the dual-path NoC router. ISCAS (2012)
Seung Eun Lee, Yoon Seok Yang, Gwan S. Choi, Wei Wu, Ravi R. Iyer
Low-Power, Resilient Interconnection with Orthogonal Latin Squares. IEEE Des. Test Comput. 28 (2) (2011)
Weihuang Wang, Gwan S. Choi, Kiran K. Gunnam
Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels. VLSI Design (2009)
Rajballav Dash, Rajesh Garg, Sunil P. Khatri, Gwan S. Choi
SEU hardened clock regeneration circuits. ISQED (2009)
Pankaj Bhagawat, Rajballav Dash, Gwan S. Choi
Array like runtime reconfigurable MIMO detectors for 802.11n WLAN: a design case study. ASP-DAC (2009)
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary
Comments on "Techniques and Architectures for Hazard-Free Semi-Parallel Decoding of LDPC Codes". EURASIP J. Embed. Syst. 2009 (2009)
Weihuang Wang, Euncheol Kim, Kiran K. Gunnam, Gwan S. Choi
Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels. J. Low Power Electron. 5 (3) (2009)
Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan S. Choi
Circuit-Level Design Approaches for Radiation-Hard Digital Electronics. IEEE Trans. Very Large Scale Integr. Syst. 17 (6) (2009)
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Shaohua Yang, Yuanxing Lee
Next generation iterative LDPC solutions for magnetic recording storage. ACSCC (2008)
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes. VLSI Design (2007)
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Mohammed Atiquzzaman
VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax. ICC (2007)
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm. VLSI Design (2006)
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
Information theoretic approach to address delay and reliability in long on-chip interconnects. ICCAD (2006)
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk. ISQED (2006)
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
Quantized LDPC decoder design for binary symmetric channels. ISCAS (6) (2005)
Rohit Singhal, Gwan S. Choi, Nathan Mickler, Prabhavati Koteeswaran
Scaleable check node centric architecture for LDPC decoder. ISCAS (4) (2004)
Seung H. Hwang, Gwan S. Choi
A Reliability Testing Environment for Off-the-Shelf Memory Subsystems. IEEE Des. Test Comput. 17 (3) (2000)
Seung H. Hwang, Gwan S. Choi
Selective-set-invalidation (SSI) for soft-error-resilient cache architecture. SIGARCH Comput. Archit. News 27 (3) (1999)
Seung H. Hwang, Gwan S. Choi
On-Chip Cache Memory Resilience. HASE (1998)
Ronjeet Lal, Gwan S. Choi
Error and Failure Analysis of a UNIX Server. HASE (1998)
Hungse Cha, Elizabeth M. Rudnick, Janak H. Patel, Ravishankar K. Iyer, Gwan S. Choi
A Gate-Level Simulation Environment for Alpha-Particle-Induced Transient Faults. IEEE Trans. Computers 45 (11) (1996)
Gregory L. Ries, Gwan S. Choi, Ravishankar K. Iyer
Device-Level Transient Fault Modeling. FTCS (1994)
Hungse Cha, Elizabeth M. Rudnick, Gwan S. Choi, Janak H. Patel, Ravishankar K. Iyer
A Fast and Accurate Gate-Level Transient Fault Simulation Environment. FTCS (1993)
Gwan S. Choi, Ravishankar K. Iyer
Wear-Out Simulation Environment for VLSI Designs. FTCS (1993)
Gwan S. Choi, Ravishankar K. Iyer, Daniel G. Saab
Fault behavior dictionary for simulation of device-level transients. ICCAD (1993)
Gwan S. Choi, Ravishankar K. Iyer
FOCUS: An Experimental Environment for Fault Sensitivity Analysis. IEEE Trans. Computers 41 (12) (1992)