Hungse Cha

Publication Activity (10 Years)

Years Active: 1993-1996
Publications (10 Years): 0

Publications

Hungse Cha, Elizabeth M. Rudnick, Janak H. Patel, Ravishankar K. Iyer, Gwan S. Choi
A Gate-Level Simulation Environment for Alpha-Particle-Induced Transient Faults. IEEE Trans. Computers 45 (11) (1996)
Hungse Cha, Janak H. Patel
Latch Design for Transient Pulse Tolerance. ICCD (1994)
Abhijit Dharchoudhury, Sung-Mo Kang, Hungse Cha, Janak H. Patel
Fast timing simulation of transient faults in digital circuits. ICCAD (1994)
Hungse Cha, Elizabeth M. Rudnick, Gwan S. Choi, Janak H. Patel, Ravishankar K. Iyer
A Fast and Accurate Gate-Level Transient Fault Simulation Environment. FTCS (1993)
Hungse Cha, Janak H. Patel
A Logic-Level Model for alpha-Paricle Hits in CMOS Circuits. ICCD (1993)