Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels.
Weihuang WangEuncheol KimKiran K. GunnamGwan S. ChoiPublished in: J. Low Power Electron. (2009)
Keyphrases
- low density parity check
- channel coding
- low power
- additive white gaussian noise
- vlsi design
- ldpc codes
- error correction
- channel capacity
- turbo codes
- error propagation
- power consumption
- source coding
- high speed
- decoding algorithm
- low cost
- fading channels
- video transmission
- error resilient
- bit error rate
- image transmission
- wireless channels
- rate allocation
- error resilience
- jpeg compression
- design methodology
- unequal error protection
- bit errors
- rate distortion
- video sequences