Gengsheng Chen

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 23

Top Topics

Fpga Implementation

Pose Estimation

Vessel Segmentation

Image Deblurring

Top Venues

IEICE Trans. Inf. Syst.

Publications

Zifeng Zhao, Xinghao Zhu, Jiyuan Bai, Gengsheng Chen
PAIR: Periodically Alternate the Identity of Routers to Ensure Deadlock Freedom in NoC. ASPDAC (2024)
Yixuan Tong, Gengsheng Chen, Wei Xu
DSSMNeRF: Depth Self-supervised MVS NeRF. ASICON (2023)
Jing Zhang, Gengsheng Chen, Lingyun Ke, Luchang Ding, Xin Fan, Zehao Wu, Lei Shen, Chang Cai
Hardware-Friendly Block Variable-Length Sampling Pruning for Graph Neural Networks. MWSCAS (2023)
Luchang Ding, Chang Cai, Gengsheng Chen, Zehao Wu, Jing Zhang, Chang Wu, Jun Yu
Characterization of Single Event Upsets of Nanoscale FDSOI Circuits Based on the Simulation and Irradiation Results. ISCAS (2022)
Luchang Ding, Jing Zhang, Chang Wu, Chang Cai, Gengsheng Chen
Real-Time Image Inpainting using PatchMatch Based Two-Generator Adversarial Networks with Optimized Edge Loss Function. ISCAS (2022)
Xiang Wang, Zikang Zhang, Yiting Wang, Chang Cai, Gengsheng Chen
A Fast and Efficient FPGA-based Pose Estimation Solution for IoT Applications. MWSCAS (2022)
Chang Cai, Bingxu Ning, Xue Fan, Tianqi Liu, Lingyun Ke, Gengsheng Chen, Jian Yu, Ze He, Liewei Xu, Jie Liu
SEU sensitivity and large spacing TMR efficiency of Kintex-7 and Virtex-7 FPGAs. Sci. China Inf. Sci. 65 (2) (2022)
Yiting Wang, Zhenyin Zhang, Gengsheng Chen
EG-HRNet: An Efficient High-Resolution Network Using Ghost-Modules for Human Pose Estimation. ASICON (2021)
Chang Cai, Luchang Ding, Ze He, Jian Yu, Jie Liu, Jiyuan Bai, Gengsheng Chen, Jun Yu
Simulation of SEU Response of Advanced 20 nm FDSOI SRAMs. ASICON (2021)
Jiyuan Bai, Xiang Wang, Zikang Zhang, Chang Cai, Gengsheng Chen
A Hierarchical Fault Injection System for RISC-V Processors Targeting Single Event Upsets in Flip-Flops. ASICON (2021)
Xiaomin Li, Gengsheng Chen
Improving Topology Consistency of Retinal Vessel Segmentation via a Double U-Net with Asymmetric Convolution. MICAD (2021)
Hanchen Ye, Xiaofan Zhang, Zhize Huang, Gengsheng Chen, Deming Chen
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation. DAC (2020)
Hanchen Ye, Xiaofan Zhang, Zhize Huang, Gengsheng Chen, Deming Chen
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation. CoRR (2020)
Minyuan Ye, Dong Lyu, Gengsheng Chen
Scale-Iterative Upscaling Network for Image Deblurring. IEEE Access 8 (2020)
Xinyu Zhu, Jun Zhang, Gengsheng Chen
ASAN: Self-Attending and Semantic Activating Network towards Better Object Detection. IEICE Trans. Inf. Syst. (3) (2020)
Chang Cai, Ze He, Tianqi Liu, Gengsheng Chen, Jian Yu, Liewei Xu, Jie Liu
Characterization of Heavy Ion Induced SET Features in 22-nm FD-SOI Testing Circuits. IEEE Access 8 (2020)
Chang Cai, Tianqi Liu, Jie Liu, Gengsheng Chen, Luchang Ding, Kai Zhao, Bingxu Ning, Mingjie Shen
Large-tilt Heavy Ions Induced SEU in Multiple Radiation Hardened 22 nm FDSOI SRAMs. IRPS (2020)
Yuan Xie, Luchang Ding, Aaron Zhou, Gengsheng Chen
An Optimized Face Recognition for Edge Computing. ASICON (2019)
Chengcheng Jiang, Xinyu Zhu, Chao Li, Gengsheng Chen
A Robust Tracking with Low-Dimensional Target-Specific Feature Extraction. IEICE Trans. Inf. Syst. (7) (2019)
Luchang Ding, Zhize Huang, Gengsheng Chen
An FPGA Implementation of GCN with Sparse Adjacency Matrix. ASICON (2019)
Minyuan Ye, Lei He, Gengsheng Chen
A Coarse-to-fine Classification for Motion Blur Kernel Size Estimation with Cascaded Neural Networks. ASICON (2019)
Zhongshan Zheng, Zhentao Li, Gengsheng Chen, Jiajun Luo, Zhengsheng Han
Roles of the gate length and width of the transistors in increasing the single event upset resistance of SRAM cells. ASICON (2017)
Chao Huang, Siyu Ni, Gengsheng Chen
A layer-based structured design of CNN on FPGA. ASICON (2017)
Gengsheng Chen, Chenxi Qian, Jun Tao
SSTA Scheme for Multiple Input Switching Case Based on Stochastic Collocation Method. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2012)
Meng Yang, Gengsheng Chen
Single event upset mitigation for FDP2008. ASICON (2011)
Yiou Chen, Jianhao Hu, Gengsheng Chen, Xiang Ling
Energy and delay-aware mapping for real-time digital processing system on network on chip platforms. SoCC (2010)
Hai Wang, Sheldon X.-D. Tan, Gengsheng Chen
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method. ASP-DAC (2010)
Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Yici Cai
Efficient model reduction of interconnects via double gramians approximation. ASP-DAC (2010)
Ruijing Shen, Sheldon X.-D. Tan, Jian Cui, Wenjian Yu, Yici Cai, Gengsheng Chen
Variational Capacitance Extraction and Modeling Based on Orthogonal Polynomial Method. IEEE Trans. Very Large Scale Integr. Syst. 18 (11) (2010)
Duo Li, Sheldon X.-D. Tan, Gengsheng Chen, Xuan Zeng
Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method. ASP-DAC (2009)
Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Lifeng Wu
Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method. ICCAD (2008)
Jian Cui, Gengsheng Chen, Ruijing Shen, Sheldon X.-D. Tan, Wenjian Yu, Jiarong Tong
Variational capacitance modeling using orthogonal polynomial method. ACM Great Lakes Symposium on VLSI (2008)