An FPGA Implementation of GCN with Sparse Adjacency Matrix.

Luchang Ding Zhize Huang Gengsheng Chen

Published in: ASICON (2019)

Keyphrases

fpga implementation
adjacency matrix
graph representation
hardware implementation
graph matching
weighted graph
graph partitioning
directed graph
positive definite
field programmable gate array
high dimensional
edit distance
graph clustering
graph model
undirected graph
image processing algorithms