Éricles Sousa

Publication Activity (10 Years)

Years Active: 2014-2021
Publications (10 Years): 6

Top Topics

Resource Manager

Harris Corner Detector

Top Venues

it Inf. Technol.

J. Syst. Archit.

Publications

Marcel Brand, Michael Witterauf, Éricles Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich
*-Predictable MPSoC execution of real-time control applications using invasive computing. Concurr. Comput. Pract. Exp. 33 (14) (2021)
Éricles Sousa, Michael Witterauf, Marcel Brand, Alexandru Tanase, Frank Hannig, Jürgen Teich
Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study. ASAP (2018)
Éricles Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich
A reconfigurable memory architecture for system integration of coarse-grained reconfigurable arrays. ReConFig (2017)
Heba Khdr, Santiago Pagani, Éricles Sousa, Vahid Lari, Anuj Pathania, Frank Hannig, Muhammad Shafique, Jürgen Teich, Jörg Henkel
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores. IEEE Trans. Computers 66 (3) (2017)
Éricles Sousa, Arindam Chakraborty, Alexandru Tanase, Frank Hannig, Jürgen Teich
TCPA editor: A design automation environment for a class of coarse-grained reconfigurable arrays. ReConFig (2017)
Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel
Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. 58 (6) (2016)
Éricles Sousa, Frank Hannig, Jürgen Teich, Qingqing Chen, Ulf Schlichtmann
Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays. SCOPES (2015)
Éricles Sousa, Frank Hannig, Jürgen Teich
Reconfigurable Buffer Structures for Coarse-Grained Reconfigurable Arrays. IESS (2015)
Johny Paul, Walter Stechele, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Daniel Lohmann, Wolfgang Schröder-Preikschat, Manfred Kröhnert, Tamim Asfour, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich, Artjom Grudnitsky, Lars Bauer, Jörg Henkel
Resource-awareness on heterogeneous MPSoCs for image processing. J. Syst. Archit. 61 (10) (2015)
Éricles Sousa, Deepak Gangadharan, Frank Hannig, Jürgen Teich
Runtime Reconfigurable Bus Arbitration for Concurrent Applications on Heterogeneous MPSoC Architectures. DSD (2014)
Deepak Gangadharan, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich
Application-driven reconfiguration of shared resources for timing predictability of MPSoC platforms. ACSSC (2014)
Johny Paul, Walter Stechele, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich, Manfred Kröhnert, Tamim Asfour
Self-adaptive harris corner detector on heterogeneous many-core processor. DASIP (2014)
Éricles Sousa
Resource-aware Computer Vision Algorithms on Heterogeneous MPSoC Architectures. Joint Workshop of the German Research Training Groups in Computer Science (2014)